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Message-Id: <20180221161606.32247-4-jae.hyun.yoo@linux.intel.com>
Date: Wed, 21 Feb 2018 08:16:01 -0800
From: Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com>
To: joel@....id.au, andrew@...id.au, arnd@...db.de,
gregkh@...uxfoundation.org, jdelvare@...e.com, linux@...ck-us.net,
benh@...nel.crashing.org, andrew@...n.ch
Cc: linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
devicetree@...r.kernel.org, linux-hwmon@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, openbmc@...ts.ozlabs.org,
Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com>
Subject: [PATCH v2 3/8] [PATCH 3/8] ARM: dts: aspeed: peci: Add PECI node
This commit adds PECI bus/adapter node of AST24xx/AST25xx into
aspeed-g4 and aspeed-g5.
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com>
---
arch/arm/boot/dts/aspeed-g4.dtsi | 25 +++++++++++++++++++++++++
arch/arm/boot/dts/aspeed-g5.dtsi | 25 +++++++++++++++++++++++++
2 files changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index b0d8431a3700..077b4d6795b8 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -250,6 +251,13 @@
};
};
+ peci: peci@...8b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@...8d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -290,6 +298,23 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2400-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ clock-frequency = <24000000>;
+ msg-timing-nego = <1>;
+ addr-timing-nego = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 40de3b66c33f..5d3b5e177a32 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -29,6 +29,7 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart;
+ peci0 = &peci0;
};
cpus {
@@ -301,6 +302,13 @@
};
};
+ peci: peci@...8b000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1e78b000 0x60>;
+ };
+
uart2: serial@...8d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
@@ -341,6 +349,23 @@
};
};
+&peci {
+ peci0: peci-bus@0 {
+ compatible = "aspeed,ast2500-peci";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <15>;
+ clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+ clock-frequency = <24000000>;
+ msg-timing-nego = <1>;
+ addr-timing-nego = <1>;
+ rd-sampling-point = <8>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+};
+
&i2c {
i2c_ic: interrupt-controller@0 {
#interrupt-cells = <1>;
--
2.16.1
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