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Message-ID: <aa4ce18d-fd83-c7f1-22fc-59538881ea51@suse.de>
Date: Wed, 21 Feb 2018 23:38:33 +0100
From: Andreas Färber <afaerber@...e.de>
To: Andy Shevchenko <andy.shevchenko@...il.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
刘炜 <liuwei@...ions-semi.com>,
mp-cs@...ions-semi.com, 96boards@...obotics.com,
devicetree <devicetree@...r.kernel.org>,
Daniel Thompson <daniel.thompson@...aro.org>,
amit.kucheria@...aro.org,
linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
hzhang@...obotics.com, bdong@...obotics.com
Subject: Re: [PATCH v2 08/10] gpio: Add gpio driver for Actions OWL S900 SoC
Am 21.02.2018 um 20:13 schrieb Andy Shevchenko:
> On Wed, Feb 21, 2018 at 6:00 PM, Manivannan Sadhasivam
> <manivannan.sadhasivam@...aro.org> wrote:
>> Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers
>> controlling the gpio shares the same register range with pinctrl block.
>>
>> GPIO registers are organized as 6 banks and each bank controls the
>> maximum of 32 gpios.
>
>> +static void owl_gpio_set_reg(void __iomem *base, unsigned int pin, int flag)
>> +{
>> + u32 val;
>> +
>> + if (flag) {
>> + val = readl(base);
>> + val |= BIT(pin);
>> + writel(val, base);
>> + } else {
>> + val = readl(base);
>> + val &= ~BIT(pin);
>> + writel(val, base);
>> + }
>> +}
>
> Why not to use the same pattern as below?
>
> readl()
> if ()
> ...
> else
> ...
> writel()
>
> ?
And shouldn't that be readl_relaxed() and writel_relaxed()?
Regards,
Andreas
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