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Message-Id: <20180222142250.31348-5-rui.silva@linaro.org>
Date: Thu, 22 Feb 2018 14:22:50 +0000
From: Rui Miguel Silva <rui.silva@...aro.org>
To: horia.geanta@....com, aymen.sghaier@....com,
Herbert Xu <herbert@...dor.apana.org.au>
Cc: linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org,
Ryan Harkin <ryan.harkin@...aro.org>,
Bryan O'Donoghue <pure.logic@...us-software.ie>,
Rui Miguel Silva <rui.silva@...aro.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <kernel@...gutronix.de>,
devicetree@...r.kernel.org, Fabio Estevam <fabio.estevam@....com>,
Peng Fan <peng.fan@....com>,
"David S. Miller" <davem@...emloft.net>,
Lukas Auer <lukas.auer@...ec.fraunhofer.de>
Subject: [PATCH v4 4/4] ARM: dts: imx7s: add CAAM device node
Add CAAM device node to the i.MX7s device tree.
Cc: Shawn Guo <shawnguo@...nel.org>
Cc: Sascha Hauer <kernel@...gutronix.de>
Cc: devicetree@...r.kernel.org
Cc: "Horia Geantă" <horia.geanta@....com>
Cc: Aymen Sghaier <aymen.sghaier@....com>
Cc: Fabio Estevam <fabio.estevam@....com>
Cc: Peng Fan <peng.fan@....com>
Cc: "David S. Miller" <davem@...emloft.net>
Cc: Lukas Auer <lukas.auer@...ec.fraunhofer.de>
Signed-off-by: Rui Miguel Silva <rui.silva@...aro.org>
---
arch/arm/boot/dts/imx7s.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 9aa2bb998552..d88c179e4c00 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -822,6 +822,36 @@
status = "disabled";
};
+ crypto: caam@...00000 {
+ compatible = "fsl,sec-v4.0";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30900000 0x40000>;
+ ranges = <0 0x30900000 0x40000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_CAAM_CLK>,
+ <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
+ clock-names = "ipg", "aclk";
+
+ sec_jr0: jr0@...0 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x1000 0x1000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr1: jr1@...0 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x2000 0x1000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr2: jr1@...0 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x3000 0x1000>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
flexcan1: can@...00000 {
compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
reg = <0x30a00000 0x10000>;
--
2.16.2
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