linux-kernel - Re: [PATCH v2 14/15] clk: stm32: Add clk entry for SDMMC2 on stm32F769

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Message-ID: <fb3b26e8-0102-122b-1386-68a661139706@st.com>
Date:   Mon, 26 Feb 2018 08:41:13 +0000
From:   Patrice CHOTARD <patrice.chotard@...com>
To:     Russell King <linux@...linux.org.uk>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexandre TORGUE <alexandre.torgue@...com>
CC:     "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 14/15] clk: stm32: Add clk entry for SDMMC2 on
 stm32F769

Hi Stephen, Michael

It's a gentle reminder as this patch is present on mailing list and 
acked-by since 01/12/2018

Thanks

Patrice

On 01/16/2018 01:30 PM, patrice.chotard@...com wrote:
> From: Patrice Chotard <patrice.chotard@...com>
> 
> STM32F769 has 2 SDMMC port, add clock entry for the second one.
> 
> Signed-off-by: Alexandre TORGUE <alexandre.torgue@...com>
> Signed-off-by: Patrice Chotard <patrice.chotard@...com>
> Acked-by: Stephen Boyd <sboyd@...eaurora.org>
> ---
> 
> v2 _ Add Acked-by
> 
>   drivers/clk/clk-stm32f4.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
> index 96c6b6b..8f8a178 100644
> --- a/drivers/clk/clk-stm32f4.c
> +++ b/drivers/clk/clk-stm32f4.c
> @@ -282,6 +282,7 @@ struct stm32f4_gate_data {
>   
>   	{ STM32F4_RCC_APB2ENR,  0,	"tim1",		"apb2_mul" },
>   	{ STM32F4_RCC_APB2ENR,  1,	"tim8",		"apb2_mul" },
> +	{ STM32F4_RCC_APB2ENR,  7,	"sdmmc2",	"sdmux"    },
>   	{ STM32F4_RCC_APB2ENR,  8,	"adc1",		"apb2_div" },
>   	{ STM32F4_RCC_APB2ENR,  9,	"adc2",		"apb2_div" },
>   	{ STM32F4_RCC_APB2ENR, 10,	"adc3",		"apb2_div" },
> @@ -315,7 +316,7 @@ struct stm32f4_gate_data {
>   
>   static const u64 stm32f746_gate_map[MAX_GATE_MAP] = { 0x000000f17ef417ffull,
>   						      0x0000000000000003ull,
> -						      0x04f77f033e01c9ffull };
> +						      0x04f77f833e01c9ffull };
>   
>   static const u64 *stm32f4_gate_map;
>   
>