lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <f52a0ca12ca45b41467959ee7b5601fe@codeaurora.org>
Date:   Tue, 27 Feb 2018 13:22:11 +0800
From:   cang@...eaurora.org
To:     Rob Herring <robh@...nel.org>
Cc:     subhashj@...eaurora.org, asutoshd@...eaurora.org,
        vivek.gautam@...eaurora.org, rnayak@...eaurora.org,
        vinholikatti@...il.com, jejb@...ux.vnet.ibm.com,
        martin.petersen@...cle.com, linux-scsi@...r.kernel.org,
        Gilad Broner <gbroner@...eaurora.org>,
        Mark Rutland <mark.rutland@....com>,
        Venkat Gopalakrishnan <venkatg@...eaurora.org>,
        Noa Rubens <noag@...eaurora.org>,
        Sujit Reddy Thumma <sthumma@...eaurora.org>,
        Maya Erez <merez@...eaurora.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] scsi: ufs-qcom: add number of lanes per direction

On 2018-02-09 10:29, Rob Herring wrote:
> On Mon, Feb 05, 2018 at 08:02:07PM +0800, Can Guo wrote:
>> From: Gilad Broner <gbroner@...eaurora.org>
>> 
>> Different platforms may have different number of lanes for the UFS 
>> link.
>> Add parameter to device tree specifying how many lanes should be
>> configured for the UFS link. And don't print err message for clocks
>> that are optional, this leads to unnecessary confusion about failure.
>> 
>> Signed-off-by: Gilad Broner <gbroner@...eaurora.org>
>> Signed-off-by: Subhash Jadavani <subhashj@...eaurora.org>
>> Signed-off-by: Can Guo <cang@...eaurora.org>
>> 
>> diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt 
>> b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> index 5357919..4cee3f9 100644
>> --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> @@ -31,6 +31,9 @@ Optional properties:
>>  			  defined or a value in the array is "0" then it is assumed
>>  			  that the frequency is set by the parent clock or a
>>  			  fixed rate clock source.
>> +- lanes-per-direction:	number of lanes available per direction - 
>> either 1 or 2.
>> +			Note that it is assume same number of lanes is used both 
>> directions at once.
> 
> Seems reasonable until someone does not make things symmetrical. We
> should design for that case.
> 
You are right, I will make changes like using lanes-tx and lanes-rx for 
Tx/Rx links for asymmetrial senarios and upload V2 patch
>> +			If not specified, default is 2 lanes per direction.
>> 
>>  Note: If above properties are not defined it can be assumed that the 
>> supply
>>  regulators or clocks are always on.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ