linux-kernel - Re: [PATCH V2 1/2] [media] Add Rockchip RK1608 driver

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Message-ID: <14366388.KYv6Y7EbEA@phil>
Date:   Tue, 27 Feb 2018 16:12:04 +0100
From:   Heiko Stuebner <heiko@...ech.de>
To:     温暖 <leo.wen@...k-chips.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        David Wu <david.wu@...k-chips.com>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Greg KH <gregkh@...uxfoundation.org>,
        Randy Dunlap <rdunlap@...radead.org>,
        "jacob2.chen@...k-chips.com" <jacob2.chen@...k-chips.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-media@...r.kernel.org" <linux-media@...r.kernel.org>,
        Eddie Cai <eddie.cai@...k-chips.com>
Subject: Re: [PATCH V2 1/2] [media] Add Rockchip RK1608 driver

Hi Leo,

Am Dienstag, 27. Februar 2018, 04:15:46 CET schrieb 温暖:
> Thank you for your advice! I will revise it according to your suggestion.

please also keep an eye on my reply to Linus' mail pointing out some
other issues where the driver should not tie into soc-specific areas
like the clock controller etc.


Thanks
Heiko

Am Dienstag, 27. Februar 2018, 04:15:46 CET schrieb 温暖:
> On 2/26/2018 18:12，Linus Walleij<linus.walleij@...aro.org>  wrote：
> On Mon, Feb 26, 2018 at 9:16 AM, Wen Nuan <leo.wen@...k-chips.com> wrote:
> +               pdata->grf_gpio2b_iomux = ioremap((resource_size_t)
>  +                                                 (GRF_BASE_ADDR +
>  +                                                  GRF_GPIO2B_IOMUX), 4);
>  +               grf_val = __raw_readl(pdata->grf_gpio2b_iomux);
>  +               __raw_writel(((grf_val) | (1 << 6) | (1 << (6 + 16))),
>  +                            pdata->grf_gpio2b_iomux);
>  +
>  +               pdata->grf_io_vsel = ioremap((resource_size_t)
>  +                                             (GRF_BASE_ADDR + GRF_IO_VSEL), 4);
>  +               grf_val = __raw_readl(pdata->grf_io_vsel);
>  +               __raw_writel(((grf_val) | (1 << 1) | (1 << (1 + 16))),
>  +                            pdata->grf_io_vsel);
> 
> You are doing pin control on the side of the pin control subsystem
> it looks like?
> 
> I think David Wu and Heiko Stubner needs to have a look at what you
> are doing here to suggest other solutions.
> 
> Apart from that, why use __raw_writel instead of just writel()?
> 
> This pin is iomux, default GPIO, need to be changed to CLK. 
> This CLK is provided to external sensor for use.
> I'll use writel().

As stated, please don't directly access soc blocks like the clock
controller or iomuxes, there are standard APIs like the general
clock API and also assigned-clock* devicetree properties.

Similarly for pinctrl access.

So there should not be any writel (or ioremap) at all in this spi driver
I'd think.


Thanks
Heiko