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Message-ID: <DM5PR12MB1916C11E8B578EBA43CE2B82F8C00@DM5PR12MB1916.namprd12.prod.outlook.com>
Date:   Tue, 27 Feb 2018 15:33:44 +0000
From:   "Ghannam, Yazen" <Yazen.Ghannam@....com>
To:     Borislav Petkov <bp@...e.de>
CC:     "linux-efi@...r.kernel.org" <linux-efi@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "ard.biesheuvel@...aro.org" <ard.biesheuvel@...aro.org>,
        "x86@...nel.org" <x86@...nel.org>
Subject: RE: [PATCH v2 5/8] efi: Decode IA32/X64 Cache, TLB, and Bus Check
 structures

> -----Original Message-----
> From: Borislav Petkov [mailto:bp@...e.de]
> Sent: Tuesday, February 27, 2018 10:04 AM
> To: Ghannam, Yazen <Yazen.Ghannam@....com>
> Cc: linux-efi@...r.kernel.org; linux-kernel@...r.kernel.org;
> ard.biesheuvel@...aro.org; x86@...nel.org
> Subject: Re: [PATCH v2 5/8] efi: Decode IA32/X64 Cache, TLB, and Bus Check
> structures
> 
> On Mon, Feb 26, 2018 at 01:39:01PM -0600, Yazen Ghannam wrote:
> > +static void print_err_info(const char *pfx, u8 err_type, u64 check)
> > +{
> > +	u16 validation_bits = CHECK_VALID_BITS(check);
> > +
> > +	printk("%sValidation Bits: 0x%04x\n", pfx, validation_bits);
> > +
> > +	if (err_type == ERR_TYPE_MS)
> > +		return;
> > +
> > +	if (validation_bits & CHECK_VALID_TRANS_TYPE) {
> > +		u8 trans_type = CHECK_TRANS_TYPE(check);
> > +
> > +		printk("%sTransaction Type: %u, %s\n", pfx, trans_type,
> > +		       trans_type < ARRAY_SIZE(ia_check_trans_type_strs) ?
> > +		       ia_check_trans_type_strs[trans_type] : "unknown");
> > +	}
> > +
> > +	if (validation_bits & CHECK_VALID_OPERATION) {
> > +		u8 op = CHECK_OPERATION(check);
> > +
> > +		/*
> > +		 * CACHE has more operation types than TLB or BUS, though
> the
> > +		 * name and the order are the same.
> > +		 */
> > +		u8 max_ops = (err_type == ERR_TYPE_CACHE) ? 9 : 7;
> > +
> > +		printk("%sOperation: %u, %s\n", pfx, op,
> > +		       op < max_ops ? ia_check_op_strs[op] : "unknown");
> > +	}
> > +
> > +	if (validation_bits & CHECK_VALID_LEVEL)
> > +		printk("%sLevel: %llu\n", pfx, CHECK_LEVEL(check));
> > +
> > +	if (validation_bits & CHECK_VALID_PCC)
> > +		print_bool("Processor Context Corrupt", pfx, check,
> CHECK_PCC);
> 
> I think we want to print PCC here unconditionally and say:
> 
> 	PCC: (yes|no|invalid)
> 
> I don't think the absence of PCC in the error record is a good enough
> hint that the PCC field is invalid.
> 
> Ditto for the rest and transaction type above too. I think it would be
> much easier if we have fixed fields error record.
> 

I agree which is why I've included the Validation Bits. A user can then
check the Validation Bits for any field that is of interest but missing.

Thanks,
Yazen

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