linux-kernel - [PATCH v8 0/2] irqchip: qcom: add support for PDC interrupt controller

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Date:   Wed, 28 Feb 2018 10:27:28 -0700
From:   Lina Iyer <ilina@...eaurora.org>
To:     tglx@...utronix.de, jason@...edaemon.net, marc.zyngier@....com
Cc:     linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        rnayak@...eaurora.org, asathyak@...eaurora.org,
        Lina Iyer <ilina@...eaurora.org>
Subject: [PATCH v8 0/2] irqchip: qcom: add support for PDC interrupt controller

Changes since v7:
	- fix whitespace alignment for multi-line statement
	- add Rob H 'reviewed-by' for DT bindings
	- rebase on top of 4.6-rc3

On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a
power domain that can be powered off when not needed. Interrupts that need to
be sensed even when the GIC is powered off, are routed through an interrupt
controller in an always-on domain called the Power Domain Controller a.k.a PDC.
This series adds support for the PDC's interrupt controller.

Please consider reviewing these patches.

RFC v1: https://patchwork.kernel.org/patch/10180857/
RFC v2: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1600634.html
v3: https://lkml.org/lkml/2018/2/6/595
v4: https://www.spinics.net/lists/linux-arm-msm/msg32906.html
v5: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1605500.html
v6: https://lkml.org/lkml/2018/2/9/545
v7: https://www.spinics.net/lists/kernel/msg2723942.html

Lina Iyer (2):
  drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs
  dt-bindings/interrupt-controller: pdc: describe PDC device binding

 .../bindings/interrupt-controller/qcom,pdc.txt     |  78 ++++++
 drivers/irqchip/Kconfig                            |   9 +
 drivers/irqchip/Makefile                           |   1 +
 drivers/irqchip/qcom-pdc.c                         | 311 +++++++++++++++++++++
 4 files changed, 399 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
 create mode 100644 drivers/irqchip/qcom-pdc.c

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