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Message-Id: <20180228181432.26847-6-manivannan.sadhasivam@linaro.org>
Date: Wed, 28 Feb 2018 23:44:27 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: linus.walleij@...aro.org, robh+dt@...nel.org, afaerber@...e.de
Cc: liuwei@...ions-semi.com, mp-cs@...ions-semi.com,
96boards@...obotics.com, devicetree@...r.kernel.org,
daniel.thompson@...aro.org, amit.kucheria@...aro.org,
linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org, hzhang@...obotics.com,
bdong@...obotics.com, manivannanece23@...il.com,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: [PATCH v3 05/10] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC
Add gpio nodes for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
---
.../devicetree/bindings/gpio/actions,owl-gpio.txt | 95 ++++++++++++++++++++++
1 file changed, 95 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
new file mode 100644
index 000000000000..d2939ca6cfaf
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
@@ -0,0 +1,95 @@
+* Actions Semi OWL GPIO controller bindings
+
+The GPIOs are organized as individual banks/ports with variable number
+of GPIOs. Each bank is represented as an individual GPIO controller.
+
+Required properties:
+- compatible : Should be "actions,s900-gpio"
+- reg : Address and range of the GPIO controller registers.
+- gpio-controller : Marks the device node as a GPIO controller.
+- #gpio-cells : Should be <2>. The first cell is the gpio number
+ and the second cell is used to specify optional
+ parameters.
+- interrupt-controller : Marks the device node as an interrupt controller.
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt. Shall be set to 2. The first cell
+ defines the interrupt number, the second encodes
+ the trigger flags described in
+ bindings/interrupt-controller/interrupts.txt
+
+Optional properties:
+- gpio-ranges : Mapping between GPIO and pinctrl
+
+Note: Each GPIO port should have an alias correctly numbered in "aliases"
+node.
+
+Examples:
+
+aliases {
+ gpio0 = &gpioa;
+ gpio1 = &gpiob;
+ gpio2 = &gpioc;
+ gpio3 = &gpiod;
+ gpio4 = &gpioe;
+ gpio5 = &gpiof;
+};
+
+ gpioa: gpioa@...b0000 {
+ compatible = "actions,s900-gpio";
+ reg = <0x0 0xe01b0000 0x0 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 0 32>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpiob: gpiob@...b0000 {
+ compatible = "actions,s900-gpio";
+ reg = <0x0 0xe01b0000 0x0 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 32 32>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpioc: gpioc@...b0000 {
+ compatible = "actions,s900-gpio";
+ reg = <0x0 0xe01b0000 0x0 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 64 12>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpiod: gpiod@...b0000 {
+ compatible = "actions,s900-gpio";
+ reg = <0x0 0xe01b0000 0x0 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 76 30>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpioe: gpioe@...b0000 {
+ compatible = "actions,s900-gpio";
+ reg = <0x0 0xe01b0000 0x0 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 106 32>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpiof: gpiof@...b0000 {
+ compatible = "actions,s900-gpio";
+ reg = <0x0 0xe01b0000 0x0 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 138 8>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
--
2.14.1
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