[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20180228084321.GA2969@pd.tnic>
Date: Wed, 28 Feb 2018 09:43:21 +0100
From: Borislav Petkov <bp@...e.de>
To: Yazen Ghannam <Yazen.Ghannam@....com>,
Tony Luck <tony.luck@...el.com>
Cc: linux-efi@...r.kernel.org, linux-kernel@...r.kernel.org,
ard.biesheuvel@...aro.org, x86@...nel.org
Subject: Re: [PATCH v2 0/8] Decode IA32/X64 CPER
On Mon, Feb 26, 2018 at 01:38:56PM -0600, Yazen Ghannam wrote:
> From: Yazen Ghannam <yazen.ghannam@....com>
>
> This series adds decoding for the IA32/X64 Common Platform Error Record.
One much more important thing I forgot about yesterday: how is
this thing playing into our RAS reporting, x86 decoding chain, etc
infrastructure?
Is CPER bypassing it completely and the firmware is doing everything
now? I sure hope not.
If not, it needs to tie into our infrastructure and the errors need
to go into the decoding chain where different things look at them and
filter them.
Tony, what are your plans here?
Perhaps we can finally get MCE decoding on Intel too :-)
Thx.
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
Powered by blists - more mailing lists