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Message-ID: <20180301094147.2mjgpfq4q64gtptv@flea>
Date:   Thu, 1 Mar 2018 10:41:47 +0100
From:   Maxime Ripard <maxime.ripard@...tlin.com>
To:     Giulio Benetti <giulio.benetti@...ronovasrl.com>
Cc:     David Airlie <airlied@...ux.ie>, Chen-Yu Tsai <wens@...e.org>,
        dri-devel@...ts.freedesktop.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/sun4i: Fix dclk_set_phase

On Wed, Feb 28, 2018 at 05:46:53PM +0100, Giulio Benetti wrote:
> Phase value is not shifted before writing.
> 
> Shift left of 28 bits to fit right bits
> 
> Signed-off-by: Giulio Benetti <giulio.benetti@...ronovasrl.com>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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