linux-kernel - Re: [PATCH v7 00/13] Support PPTT for ARM64

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Message-ID: <8b5bfd7e-57ea-bb34-85f8-69007a3847e6@arm.com>
Date:   Thu, 1 Mar 2018 12:06:15 +0000
From:   Sudeep Holla <sudeep.holla@....com>
To:     Jeremy Linton <jeremy.linton@....com>, linux-acpi@...r.kernel.org
Cc:     Sudeep Holla <sudeep.holla@....com>,
        linux-arm-kernel@...ts.infradead.org, lorenzo.pieralisi@....com,
        hanjun.guo@...aro.org, rjw@...ysocki.net, will.deacon@....com,
        catalin.marinas@....com, gregkh@...uxfoundation.org,
        mark.rutland@....com, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, wangxiongfeng2@...wei.com,
        vkilari@...eaurora.org, ahs3@...hat.com, dietmar.eggemann@....com,
        morten.rasmussen@....com, palmer@...ive.com, lenb@...nel.org,
        john.garry@...wei.com, austinwc@...eaurora.org,
        tnowicki@...iumnetworks.com
Subject: Re: [PATCH v7 00/13] Support PPTT for ARM64

Hi Jeremy,

On 28/02/18 22:06, Jeremy Linton wrote:
> ACPI 6.2 adds the Processor Properties Topology Table (PPTT), which is
> used to describe the processor and cache topology. Ideally it is
> used to extend/override information provided by the hardware, but
> right now ARM64 is entirely dependent on firmware provided tables.
> 
> This patch parses the table for the cache topology and CPU topology.
> When we enable ACPI/PPTT for arm64 we map the physical_id to the
> PPTT node flagged as the physical package by the firmware.
> This results in topologies that match what the remainder of the
> system expects. To avoid inverted scheduler domains we then
> set the MC domain equal to the largest cache within the socket
> below the NUMA domain.
> 
I remember reviewing and acknowledging most of the cacheinfo stuff with
couple of minor suggestions for v6. I don't see any Acked-by tags in
this series and don't know if I need to review/ack any more cacheinfo
related patches.

-- 
Regards,
Sudeep