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Date: Thu, 1 Mar 2018 11:27:50 +0800
From: <sean.wang@...iatek.com>
To: <sboyd@...eaurora.org>, <mturquette@...libre.com>,
<robh+dt@...nel.org>, <matthias.bgg@...il.com>,
<mark.rutland@....com>, <p.zabel@...gutronix.de>
CC: <devicetree@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>,
<linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, Sean Wang <sean.wang@...iatek.com>,
<stable@...r.kernel.org>
Subject: [PATCH 1/2] dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4
From: Sean Wang <sean.wang@...iatek.com>
Just add binding for a fixed-factor clock axisel_d4, which would be
referenced by PWM devices on MT7623 or MT2701 SoC.
Cc: stable@...r.kernel.org
Fixes: 1de9b21633d6 ("clk: mediatek: Add dt-bindings for MT2701 clocks")
Signed-off-by: Sean Wang <sean.wang@...iatek.com>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: devicetree@...r.kernel.org
---
include/dt-bindings/clock/mt2701-clk.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/mt2701-clk.h b/include/dt-bindings/clock/mt2701-clk.h
index 551f760..24e93df 100644
--- a/include/dt-bindings/clock/mt2701-clk.h
+++ b/include/dt-bindings/clock/mt2701-clk.h
@@ -176,7 +176,8 @@
#define CLK_TOP_AUD_EXT1 156
#define CLK_TOP_AUD_EXT2 157
#define CLK_TOP_NFI1X_PAD 158
-#define CLK_TOP_NR 159
+#define CLK_TOP_AXISEL_D4 159
+#define CLK_TOP_NR 160
/* APMIXEDSYS */
--
2.7.4
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