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Date:   Fri, 2 Mar 2018 13:25:34 +0200
From:   Peter De Schrijver <pdeschrijver@...dia.com>
To:     Jon Hunter <jonathanh@...dia.com>
CC:     Dmitry Osipenko <digetx@...il.com>,
        Marcel Ziswiler <marcel.ziswiler@...adex.com>,
        "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "pgaikwad@...dia.com" <pgaikwad@...dia.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        "thierry.reding@...il.com" <thierry.reding@...il.com>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>
Subject: Re: [PATCH] clk: tegra: fix pllu rate configuration

On Fri, Mar 02, 2018 at 09:02:07AM +0000, Jon Hunter wrote:
> 
> On 01/03/18 07:41, Peter De Schrijver wrote:
> > On Wed, Feb 28, 2018 at 08:20:47PM +0300, Dmitry Osipenko wrote:
> >> On 28.02.2018 17:14, Peter De Schrijver wrote:
> >>> On Wed, Feb 28, 2018 at 03:00:23PM +0300, Dmitry Osipenko wrote:
> >>>> On 28.02.2018 12:36, Peter De Schrijver wrote:
> >>>>> On Tue, Feb 27, 2018 at 02:59:11PM +0300, Dmitry Osipenko wrote:
> >>>>>> On 27.02.2018 02:04, Marcel Ziswiler wrote:
> >>>>>>> On Mon, 2018-02-26 at 15:42 +0300, Dmitry Osipenko wrote:
> >>>>>>>> On 23.02.2018 02:04, Marcel Ziswiler wrote:
> >>>>>>>>> Turns out latest upstream U-Boot does not configure/enable pllu
> >>>>>>>>> which
> >>>>>>>>> leaves it at some default rate of 500 kHz:
> >>>>>>>>>
> >>>>>>>>> root@...lis-t30:~# cat /sys/kernel/debug/clk/clk_summary | grep
> >>>>>>>>> pll_u
> >>>>>>>>>        pll_u                  3        3        0      500000      
> >>>>>>>>>     0
> >>>>>>>>>
> >>>>>>>>> Of course this won't quite work leading to the following messages:
> >>>>>>>>>
> >>>>>>>>> [    6.559593] usb 2-1: new full-speed USB device number 2 using
> >>>>>>>>> tegra-
> >>>>>>>>> ehci
> >>>>>>>>> [   11.759173] usb 2-1: device descriptor read/64, error -110
> >>>>>>>>> [   27.119453] usb 2-1: device descriptor read/64, error -110
> >>>>>>>>> [   27.389217] usb 2-1: new full-speed USB device number 3 using
> >>>>>>>>> tegra-
> >>>>>>>>> ehci
> >>>>>>>>> [   32.559454] usb 2-1: device descriptor read/64, error -110
> >>>>>>>>> [   47.929777] usb 2-1: device descriptor read/64, error -110
> >>>>>>>>> [   48.049658] usb usb2-port1: attempt power cycle
> >>>>>>>>> [   48.759475] usb 2-1: new full-speed USB device number 4 using
> >>>>>>>>> tegra-
> >>>>>>>>> ehci
> >>>>>>>>> [   59.349457] usb 2-1: device not accepting address 4, error -110
> >>>>>>>>> [   59.509449] usb 2-1: new full-speed USB device number 5 using
> >>>>>>>>> tegra-
> >>>>>>>>> ehci
> >>>>>>>>> [   70.069457] usb 2-1: device not accepting address 5, error -110
> >>>>>>>>> [   70.079721] usb usb2-port1: unable to enumerate USB device
> >>>>>>>>>
> >>>>>>>>> Fix this by actually allowing the rate also being set from within
> >>>>>>>>> the Linux kernel.
> >>>>>
> >>>>> I think the best solution to this problem would be to make pll_u a fixed
> >>>>> clock and enable it and program the rate if it's not enabled at boot.
> >>>>
> >>>> Oh, right. PLL_U rate is actually configurable, somehow I missed it in TRM
> >>>> yesterday.. So set/round_rate() for PLL_U are actually needed and the patch is
> >>>> correct. Seems only T20 misses PLL_U in the init table, probably worth to add it
> >>>> there.
> >>>>
> >>>
> >>> AFAIK we only use one rate ever?
> >>
> >> IIUC, PLL_U has 3 outputs and output dividers are fixed in HW. So yes, we are
> >> setting PLL_U to one rate - 480MHz to get out1-480MHz, out2-60MHz and out3-12MHz.
> >>
> > 
> > Indeed. And given that it's hw controlled anyway, I don't see why we can't make
> > it a fixed clock and handle the init at kernel boot depending on what the
> > bootloader has done.
> 
> Peter, are you suggesting we implement the equivalent to
> tegra210_init_pllu()? This does look a bit more involved that what this
> change is doing. Is there a simple way to do what you are suggesting?
> 

Basically yes.

Peter.

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