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Date: Sat, 3 Mar 2018 11:33:55 +0300
From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To: Alexandre Belloni <alexandre.belloni@...tlin.com>,
James Hogan <jhogan@...nel.org>,
Ralf Baechle <ralf@...ux-mips.org>
Cc: Allan Nielsen <Allan.Nielsen@...rosemi.com>,
linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH v4 4/6] MIPS: mscc: add ocelot PCB123 device tree
Hello!
On 3/3/2018 1:48 AM, Alexandre Belloni wrote:
> Add a device tree for the Microsemi Ocelot PCB123 evaluation board.
>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: devicetree@...r.kernel.org
> Signed-off-by: Alexandre Belloni <alexandre.belloni@...tlin.com>
[...]
> diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
> new file mode 100644
> index 000000000000..42bd404471f6
> --- /dev/null
> +++ b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
> @@ -0,0 +1,27 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +/* Copyright (c) 2017 Microsemi Corporation */
> +
> +/dts-v1/;
> +
> +#include "ocelot.dtsi"
> +
> +/ {
> + compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
Needs to be "memory@0" as you have the "regs" prop.
> + device_type = "memory";
> + reg = <0x0 0x0e000000>;
> + };
> +};
[...]
MBR, Sergei
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