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Message-ID: <CAD9gYJ+PAN-tW-=GtY6p--T9nP17y=Gnb_=H0JUD-+X9Z+06iQ@mail.gmail.com>
Date: Mon, 5 Mar 2018 10:17:32 +0100
From: 王金浦 <jinpuwang@...il.com>
To: Alexander Sergeyev <sergeev917@...il.com>
Cc: David Woodhouse <dwmw@...zon.co.uk>,
Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
Kyle Huey <me@...ehuey.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Peter Zijlstra <peterz@...radead.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: spectre v2 microcodes blacklist (march update)
Hi,
2018-03-03 22:02 GMT+01:00 Alexander Sergeyev <sergeev917@...il.com>:
> Hi,
>
> the microcode revision guidance from Intel is revised once again [1] (1
> Mar).
>
> It looks like the following:
>
>> Intel document only clears the 0xc2 microcode on *some* parts with CPUID
>> 506E3 (INTEL_FAM6_SKYLAKE_DESKTOP stepping 3). For the Skylake H/S platform
>> it's OK but for Skylake E3 which has the same CPUID it isn't (yet) cleared.
>
>
> is no longer a problem. CPUID 506E3 with both Skylake H/S and Skylake Xeon
> E3 is labelled as "production" now.
>
> Could we drop { INTEL_FAM6_SKYLAKE_DESKTOP, 0x03, 0xc2 } from
> spectre_bad_microcodes?
+1, I have a test machine with cpuid 506e3, dell/intel releases
production BIOS version 0xC2, but due to list as bad_microcode,
IBPB function is disabled.
I would like also vote to get it remove from bad_microcode list.
>
> [1]
> https://newsroom.intel.com/wp-content/uploads/sites/11/2018/03/microcode-update-guidance.pdf
Regards,
Jack
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