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Message-Id: <20180305114541.9917-2-joel@jms.id.au>
Date: Mon, 5 Mar 2018 22:15:40 +1030
From: Joel Stanley <joel@....id.au>
To: Wim Van Sebroeck <wim@...ux-watchdog.org>,
Guenter Roeck <linux@...ck-us.net>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Marcus Folkesson <marcus.folkesson@...il.com>
Cc: linux-watchdog@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Tomer Maimon <tmaimon77@...il.com>,
Avi Fishman <avifishman70@...il.com>,
Brendan Higgins <brendanhiggins@...gle.com>
Subject: [PATCH v2 1/2] dt-bindings: watchdog: Add Nuvoton NPCM description
These bindings describe the watchdog IP as used by the Nuvoton NPCM750
(Poleg) BMC SoC.
Signed-off-by: Joel Stanley <joel@....id.au>
---
V2: Add optional timeout property
---
.../bindings/watchdog/nuvoton,npcm-wdt.txt | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
create mode 100644 Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt
diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt
new file mode 100644
index 000000000000..615eacd0b9d6
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt
@@ -0,0 +1,28 @@
+Nuvoton NPCM Watchdog
+
+Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog.
+The watchdog supports a pre-timeout interrupt that fires 10ms before the
+expiry.
+
+Required properties:
+- compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg).
+- reg : Offset and length of the register set for the device.
+- interrupts : Contain the timer interrupt with flags for
+ falling edge.
+
+Required clocking property, have to be one of:
+- clocks : phandle of timer reference clock.
+- clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx
+ timer (usually 25000000).
+
+Optional properties:
+- timeout-sec : Contains the watchdog timeout in seconds
+
+Example:
+
+timer@...080c1 {
+ compatible = "nuvoton,npcm750-wdt";
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0xf00080c1 0x4>;
+ clocks = <&clk NPCM7XX_CLK_TIMER>;
+};
--
2.15.1
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