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Message-ID: <20180305122140.wwwu4hvhssouuzcp@lakrids.cambridge.arm.com>
Date: Mon, 5 Mar 2018 12:21:40 +0000
From: Mark Rutland <mark.rutland@....com>
To: Saravana Kannan <skannan@...eaurora.org>
Cc: suzuki.poulose@....com, Peter Zijlstra <peterz@...radead.org>,
rananta@...eaurora.org, Arnaldo Carvalho de Melo <acme@...nel.org>,
linux-kernel@...r.kernel.org,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Ingo Molnar <mingo@...hat.com>,
Namhyung Kim <namhyung@...nel.org>, avilaj@...eaurora.org,
Jiri Olsa <jolsa@...hat.com>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2] perf/core: Add support for PMUs that can be read from
more than 1 CPU
On Mon, Mar 05, 2018 at 12:17:02PM +0000, Mark Rutland wrote:
> On Fri, Mar 02, 2018 at 05:14:53PM -0800, Saravana Kannan wrote:
> > @@ -629,6 +629,7 @@ struct perf_event {
> >
> > int oncpu;
> > int cpu;
> > + cpumask_t readable_on_cpus;
>
> For most PMUs, this will be emptry, and it's potentially *very* large
> (e.g. on systems where NR_CPUS is 4096). Please use a poitner to a mask,
> as I suggested in [1], e.g.
> [1] https://lkml.kernel.org/r/20171128124534.3jvuala525wvn64r@wfg-t540p.sh.intel.com
Whoops, that should've been:
[1] https://lkml.kernel.org/r/20180225143802.denbkubqjg2dc7af@salmiak
Mark.
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