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Message-ID: <3380975.Amu1WGHSQ5@diego>
Date: Mon, 05 Mar 2018 21:25:30 +0100
From: Heiko Stübner <heiko@...ech.de>
To: Daniel Schultz <d.schultz@...tec.de>
Cc: robh+dt@...nel.org, mark.rutland@....com, linux@...linux.org.uk,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, w.egorov@...tec.de
Subject: Re: [PATCH] ARM: dts: rockchip: Add dp83867 CLK_OUT muxing
Am Montag, 5. März 2018, 13:45:11 CET schrieb Daniel Schultz:
> The CLK_O_SEL default is synchronous to XI input clock, which is 25 MHz.
> Set CLK_O_SEL to channel A transmit clock so we have 125 MHz on CLK_OUT.
>
> Signed-off-by: Daniel Schultz <d.schultz@...tec.de>
applied for 4.17
Thanks
Heiko
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