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Message-id: <3b9537bb-0471-775e-d43b-1f1ccd46b94c@samsung.com>
Date: Tue, 06 Mar 2018 08:35:28 +0100
From: Marek Szyprowski <m.szyprowski@...sung.com>
To: Enric Balletbo i Serra <enric.balletbo@...labora.com>,
architt@...eaurora.org, inki.dae@...sung.com,
thierry.reding@...il.com, hjc@...k-chips.com,
seanpaul@...omium.org, airlied@...ux.ie, tfiga@...omium.org,
heiko@...ech.de
Cc: hshi@...omium.org, wzz@...k-chips.com, hl@...k-chips.com,
linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
dianders@...omium.org, linux-rockchip@...ts.infradead.org,
orjan.eide@....com,
Stéphane Marchesin <marcheu@...omium.org>
Subject: Re: [PATCH v4 15/38] drm/bridge: analogix_dp: Ensure edp is
disabled when shutting down the panel
Hi All,
This is the patch, which introduces the issue I've pointed here:
https://lists.freedesktop.org/archives/dri-devel/2018-March/167794.html
On 2018-03-05 23:23, Enric Balletbo i Serra wrote:
> From: Lin Huang <hl@...k-chips.com>
>
> When panel is shut down, we should make sure edp can be disabled to avoid
> undefined behavior.
>
> Cc: Stéphane Marchesin <marcheu@...omium.org>
> Signed-off-by: Lin Huang <hl@...k-chips.com>
> Signed-off-by: zain wang <wzz@...k-chips.com>
> Signed-off-by: Sean Paul <seanpaul@...omium.org>
> Signed-off-by: Thierry Escande <thierry.escande@...labora.com>
> Reviewed-by: Andrzej Hajda <a.hajda@...sung.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
> ---
>
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> index 92fb9a072cb6..9b7d530ad24c 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
> @@ -1160,6 +1160,12 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
>
> pm_runtime_get_sync(dp->dev);
>
> + ret = clk_prepare_enable(dp->clock);
> + if (ret < 0) {
> + DRM_ERROR("Failed to prepare_enable the clock clk [%d]\n", ret);
> + goto out_dp_clk_pre;
> + }
> +
> if (dp->plat_data->power_on)
> dp->plat_data->power_on(dp->plat_data);
>
> @@ -1191,6 +1197,8 @@ static int analogix_dp_set_bridge(struct analogix_dp_device *dp)
> phy_power_off(dp->phy);
> if (dp->plat_data->power_off)
> dp->plat_data->power_off(dp->plat_data);
> + clk_disable_unprepare(dp->clock);
> +out_dp_clk_pre:
> pm_runtime_put_sync(dp->dev);
>
> return ret;
> @@ -1234,10 +1242,13 @@ static void analogix_dp_bridge_disable(struct drm_bridge *bridge)
>
> disable_irq(dp->irq);
> phy_power_off(dp->phy);
> + analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);
In case of Exynos DP, external PHY is used to power the DP block, so no
register access should be performed after phy_power_off(). Please move
analogix_dp_set_analog_power_down() before phy_power_off().
>
> if (dp->plat_data->power_off)
> dp->plat_data->power_off(dp->plat_data);
>
> + clk_disable_unprepare(dp->clock);
> +
> pm_runtime_put_sync(dp->dev);
>
> ret = analogix_dp_prepare_panel(dp, false, true);
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
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