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Message-ID: <20180307213514.4sv7ucxo25jpomz3@rob-hp-laptop>
Date:   Wed, 7 Mar 2018 15:35:14 -0600
From:   Rob Herring <robh@...nel.org>
To:     sibis <sibis@...eaurora.org>
Cc:     bjorn.andersson@...aro.org, linux-remoteproc@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        georgi.djakov@...aro.org, jassisinghbrar@...il.com,
        p.zabel@...gutronix.de, ohad@...ery.com, mark.rutland@....com,
        kyan@...eaurora.org, sricharan@...eaurora.org,
        akdwived@...eaurora.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH 1/6] reset: qcom: AOSS (Always on subsystem) reset
 controller

On Mon, Mar 05, 2018 at 03:23:28PM +0530, sibis wrote:
> Add reset controller driver for Qualcomm SDM845 SoC to
> control reset signals provided by AOSS for Modem, Venus
> ADSP, GPU, Camera, Wireless, Display subsystem
> 
> Signed-off-by: sibis <sibis@...eaurora.org>

Need a full name here.

> ---
>  .../devicetree/bindings/reset/qcom,aoss-reset.txt  |  54 ++++++++

Separate patch for bindings (with the header) please.

>  drivers/reset/Kconfig                              |  10 ++
>  drivers/reset/Makefile                             |   1 +
>  drivers/reset/reset-qcom-aoss.c                    | 151 +++++++++++++++++++++
>  include/dt-bindings/reset/qcom,aoss-sdm845.h       |  17 +++
>  5 files changed, 233 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
>  create mode 100644 drivers/reset/reset-qcom-aoss.c
>  create mode 100644 include/dt-bindings/reset/qcom,aoss-sdm845.h
> 
> diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> new file mode 100644
> index 0000000..5318e14
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt
> @@ -0,0 +1,54 @@
> +Qualcomm AOSS Reset Controller
> +======================================
> +
> +This binding describes a reset-controller found on AOSS (Always on SubSysem)
> +for Qualcomm SDM845 SoCs.
> +
> +Required properties:
> +- compatible:
> +	Usage: required
> +	Value type: <string>
> +	Definition: must be:
> +		    "qcom,aoss-reset-sdm845", "syscon"

Someone in QCom needs to go fix the order of all your downstream 
compatibles or review your bindings before sending upstream. The 
standard ordering is <vendor>,<soc>-<block>.

Why syscon? The description is this is just a reset controller.

> +
> +- reg:
> +	Usage: required
> +	Value type: <prop-encoded-array>
> +	Definition: must specify the base address and size of the
> +		    syscon device.
> +
> +
> +- #reset-cells:
> +	Usage: required
> +	Value type: <uint>
> +	Definition: must be 1; cell entry represents the reset index.
> +
> +example:
> +
> +aoss_reset: qcom,reset-controller@...0100 {
> +	compatible = "qcom,aoss-reset-sdm845", "syscon";
> +	reg = <0xc2b0000 0x20004>;
> +	#reset-cells = <1>;
> +};
> +
> +
> +Specifying reset lines connected to IP modules
> +==============================================
> +
> +Device nodes that need access to reset lines should
> +specify them as a reset phandle in their corresponding node as
> +specified in reset.txt.
> +
> +Example:
> +
> +	modem-pil@...0000 {
> +		...
> +
> +		resets = <&aoss_reset AOSS_CC_MSS_RESTART>;
> +		reset-names = "mss_restart";
> +
> +		...
> +        };
> +
> +For list of all valid reset indicies see
> +<dt-bindings/reset/qcom,aoss-sdm845.h>

Put this before the example.

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