[<prev] [next>] [day] [month] [year] [list]
Message-ID: <tip-mzmuxocrf96v922xkerey3ns@git.kernel.org>
Date: Wed, 7 Mar 2018 00:27:04 -0800
From: tip-bot for Arnaldo Carvalho de Melo <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: adrian.hunter@...el.com, dsahern@...il.com, mingo@...nel.org,
dwmw@...zon.co.uk, acme@...hat.com, wangnan0@...wei.com,
tglx@...utronix.de, linux-kernel@...r.kernel.org,
namhyung@...nel.org, hpa@...or.com, jolsa@...nel.org
Subject: [tip:perf/urgent] tools headers: Sync x86's cpufeatures.h
Commit-ID: 4caea0574c5009901d1976980579ccd26dbf358a
Gitweb: https://git.kernel.org/tip/4caea0574c5009901d1976980579ccd26dbf358a
Author: Arnaldo Carvalho de Melo <acme@...hat.com>
AuthorDate: Mon, 5 Mar 2018 12:07:52 -0300
Committer: Arnaldo Carvalho de Melo <acme@...hat.com>
CommitDate: Mon, 5 Mar 2018 12:07:52 -0300
tools headers: Sync x86's cpufeatures.h
The changes in dd84441a7971 ("x86/speculation: Use IBRS if available
before calling into firmware") don't need any kind of special treatment
in the current tools/perf/ codebase, so just update the copy to get rid
of the perf build warning:
BUILD: Doing 'make -j4' parallel build
Warning: Kernel ABI header at 'tools/arch/x86/include/asm/cpufeatures.h' differs from latest version at 'arch/x86/include/asm/cpufeatures.h'
Cc: Adrian Hunter <adrian.hunter@...el.com>
Cc: David Ahern <dsahern@...il.com>
Cc: David Woodhouse <dwmw@...zon.co.uk>
Cc: Jiri Olsa <jolsa@...nel.org>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Wang Nan <wangnan0@...wei.com>
Link: https://lkml.kernel.org/n/tip-mzmuxocrf96v922xkerey3ns@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
---
tools/arch/x86/include/asm/cpufeatures.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h
index 0dfe4d3f74e2..f41079da38c5 100644
--- a/tools/arch/x86/include/asm/cpufeatures.h
+++ b/tools/arch/x86/include/asm/cpufeatures.h
@@ -213,6 +213,7 @@
#define X86_FEATURE_SEV ( 7*32+20) /* AMD Secure Encrypted Virtualization */
#define X86_FEATURE_USE_IBPB ( 7*32+21) /* "" Indirect Branch Prediction Barrier enabled */
+#define X86_FEATURE_USE_IBRS_FW ( 7*32+22) /* "" Use IBRS during runtime firmware calls */
/* Virtualization flags: Linux defined, word 8 */
#define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */
Powered by blists - more mailing lists