[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAOh2x=k6aXd=pPaNKhd-fna58wk4mNcMWgy1Eb=VYwECRtqLaA@mail.gmail.com>
Date: Wed, 7 Mar 2018 10:44:36 +0530
From: Viresh Kumar <viresh.kumar@...aro.org>
To: Amit Kucheria <amit.kucheria@...aro.org>
Cc: linux-arm-msm <linux-arm-msm@...r.kernel.org>,
Rajendra Nayak <rnayak@...eaurora.org>,
Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
"open list:ARM/QUALCOMM SUPPORT" <linux-soc@...r.kernel.org>,
devicetree@...r.kernel.org,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] arm64: dts: msm8916: Add cpu cooling maps
On Wed, Mar 7, 2018 at 10:30 AM, Amit Kucheria <amit.kucheria@...aro.org> wrote:
> From: Rajendra Nayak <rnayak@...eaurora.org>
>
> Add cpu cooling maps for cpu passive trip points. The cpu cooling
> device states are mapped to cpufreq based scaling frequencies.
>
> Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
> Signed-off-by: Amit Kucheria <amit.kucheria@...aro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index e468277..66b318e 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -15,6 +15,7 @@
> #include <dt-bindings/clock/qcom,gcc-msm8916.h>
> #include <dt-bindings/reset/qcom,gcc-msm8916.h>
> #include <dt-bindings/clock/qcom,rpmcc.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> / {
> model = "Qualcomm Technologies, Inc. MSM8916";
> @@ -115,6 +116,7 @@
> cpu-idle-states = <&CPU_SPC>;
> clocks = <&apcs 0>;
> operating-points-v2 = <&cpu_opp_table>;
> + #cooling-cells = <2>;
LGTM.
Powered by blists - more mailing lists