lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1520542640-9185-1-git-send-email-eajames@linux.vnet.ibm.com>
Date:   Thu,  8 Mar 2018 14:57:18 -0600
From:   Eddie James <eajames@...ux.vnet.ibm.com>
To:     linux-kernel@...r.kernel.org
Cc:     linux-clk@...r.kernel.org, joel@....id.au, mturquette@...libre.com,
        sboyd@...nel.org, eajames@...ux.vnet.ibm.com, mine260309@...il.com,
        ryan_chen@...eedtech.com
Subject: [PATCH v2 0/2] clk: aspeed: Fix is_enabled and prevent reset if clock enabled

Here are two fixes for the Aspeed clock driver. The first fixes the is_enabled
clock function to account for different clock gates getting disabled with
either 0s or 1s. The second patch addresses some issue found with the LPC
controller clock if it gets reset while the clock is enabled, which it is by
default. Thanks to Lei Yu for tracking down the LPC issue.

Changes since v1:
 - Fix is_enabled.
 - Check for enabled in the spinlock in the enable function.
 - Use is_enabled instead of more code to read the register.

Eddie James (2):
  clk: aspeed: Fix is_enabled for certain clocks
  clk: aspeed: Prevent reset if clock is enabled

 drivers/clk/clk-aspeed.c | 28 +++++++++++++++++-----------
 1 file changed, 17 insertions(+), 11 deletions(-)

-- 
1.8.3.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ