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Message-Id: <20180308094807.9443-14-jacob-chen@iotwrt.com>
Date: Thu, 8 Mar 2018 17:48:03 +0800
From: Jacob Chen <jacob-chen@...wrt.com>
To: linux-rockchip@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
mchehab@...nel.org, linux-media@...r.kernel.org,
sakari.ailus@...ux.intel.com, hans.verkuil@...co.com,
tfiga@...omium.org, zhengsq@...k-chips.com,
laurent.pinchart@...asonboard.com, zyc@...k-chips.com,
eddie.cai.linux@...il.com, jeffy.chen@...k-chips.com,
devicetree@...r.kernel.org, heiko@...ech.de,
Jacob Chen <jacob2.chen@...k-chips.com>
Subject: [PATCH v6 13/17] ARM: dts: rockchip: add rx0 mipi-phy for rk3288
From: Jacob Chen <jacob2.chen@...k-chips.com>
It's a Designware MIPI D-PHY, used by ISP in rk3288.
Signed-off-by: Jacob Chen <jacob2.chen@...k-chips.com>
---
arch/arm/boot/dts/rk3288.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 6c122aaf06a7..3a530b72c057 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -864,6 +864,13 @@
status = "disabled";
};
+ mipi_phy_rx0: mipi-phy-rx0 {
+ compatible = "rockchip,rk3288-mipi-dphy";
+ clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_CSI>;
+ clock-names = "dphy-ref", "pclk";
+ status = "disabled";
+ };
+
io_domains: io-domains {
compatible = "rockchip,rk3288-io-voltage-domain";
status = "disabled";
--
2.16.1
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