linux-kernel - [PATCH v5 1/2] of: Documentation: Specify local APIC ID in "reg"

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Message-ID: <a0a0aff3befabf74a65361d0b7b7e5bc9d00176d.1520891263.git.ivan.gorinov@intel.com>
Date:   Mon, 12 Mar 2018 15:21:48 -0700
From:   Ivan Gorinov <ivan.gorinov@...el.com>
To:     Thomas Gleixner <tglx@...utronix.de>,
        Frank Rowand <frowand.list@...il.com>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Ingo Molnar <mingo@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>
Subject: [PATCH v5 1/2] of: Documentation: Specify local APIC ID in "reg"

Set the "reg" property to the processor's local APIC ID.
Local APIC ID is assigned by hardware and may differ from CPU number.

Signed-off-by: Ivan Gorinov <ivan.gorinov@...el.com>
---
 Documentation/devicetree/bindings/x86/ce4100.txt | 38 ++++++++++++++++++------
 1 file changed, 29 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/x86/ce4100.txt b/Documentation/devicetree/bindings/x86/ce4100.txt
index b49ae59..5a4bd83 100644
--- a/Documentation/devicetree/bindings/x86/ce4100.txt
+++ b/Documentation/devicetree/bindings/x86/ce4100.txt
@@ -7,17 +7,37 @@ Many of the "generic" devices like HPET or IO APIC have the ce4100
 name in their compatible property because they first appeared in this
 SoC.
 
-The CPU node
-------------
-	cpu@0 {
-		device_type = "cpu";
-		compatible = "intel,ce4100";
-		reg = <0>;
-		lapic = <&lapic0>;
+The CPU nodes
+-------------
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "intel,ce4100";
+			reg = <0x00>;
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "intel,ce4100";
+			reg = <0x02>;
+		};
 	};
 
-The reg property describes the CPU number. The lapic property points to
-the local APIC timer.
+A "cpu" node describes one logical processor (hardware thread).
+
+Required properties:
+
+- device_type
+	Device type, must be "cpu".
+
+- reg
+	Local APIC ID, a unique number assigned to each processor by
+	hardware. This ID is used to specify the destination of interrupt
+	messages with "physical" destination mode, including startup IPI.
 
 The SoC node
 ------------
-- 
2.7.4