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Message-ID: <20180312124337.vw7bchm6brfzghfa@node.shutemov.name>
Date: Mon, 12 Mar 2018 15:43:37 +0300
From: "Kirill A. Shutemov" <kirill@...temov.name>
To: Peter Zijlstra <peterz@...radead.org>
Cc: kirill.shutemov@...ux.intel.com, gorcunov@...nvz.org,
luto@...capital.net, keescook@...omium.org, willy@...radead.org,
torvalds@...ux-foundation.org, tglx@...utronix.de, bp@...e.de,
andy.shevchenko@...il.com, linux-kernel@...r.kernel.org,
hpa@...or.com, mingo@...nel.org, ebiederm@...ssion.com,
jgross@...e.com, linux-tip-commits@...r.kernel.org
Subject: Re: [tip:x86/mm] x86/boot/compressed/64: Describe the logic behind
the LA57 check
On Mon, Mar 12, 2018 at 01:40:27PM +0100, Peter Zijlstra wrote:
> On Mon, Mar 12, 2018 at 02:27:58AM -0700, tip-bot for Kirill A. Shutemov wrote:
> > + /*
> > + * Check if LA57 is desired and supported.
> > + *
> > + * There are two parts to the check:
> > + * - if the kernel supports 5-level paging: CONFIG_X86_5LEVEL=y
> > + * - if the machine supports 5-level paging:
> > + * + CPUID leaf 7 is supported
> > + * + the leaf has the feature bit set
> > + *
> > + * That's substitute for boot_cpu_has() in early boot code.
> > + */
> > + if (IS_ENABLED(CONFIG_X86_5LEVEL) &&
> > + native_cpuid_eax(0) >= 7 &&
> > + (native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31)))) {
> > paging_config.l5_required = 1;
> > + }
>
> Should this not also include something like: machine actually has
> suffient memory for it to make sense to use l5 ?
Define "suffient". :)
The amount of physical memory is not the only reason to have 5-level
paging enabled. You may need 5-level paging to get access to wider virtual
address space to map something not backed by local physical memory
(consider RDMA).
--
Kirill A. Shutemov
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