[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <6810b7b4-3023-2e76-5fbf-7e442067cbc4@gmail.com>
Date: Wed, 14 Mar 2018 00:21:16 +0100
From: Matthias Brugger <matthias.bgg@...il.com>
To: Chunfeng Yun <chunfeng.yun@...iatek.com>,
Kishon Vijay Abraham I <kishon@...com>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Ryder Lee <ryder.lee@...iatek.com>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-usb@...r.kernel.org, linux-mediatek@...ts.infradead.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v2 3/3] dt-bindings: phy-mtk-tphy: add properties for U2
slew rate calibrate
On 03/12/2018 06:25 AM, Chunfeng Yun wrote:
> Add two properties of ref_clk and coefficient used by U2 slew rate
> calibrate which may vary on different SoCs
>
> Signed-off-by: Chunfeng Yun <chunfeng.yun@...iatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>
> ---
> Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> index 41e09ed..0d34b2b 100644
> --- a/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> +++ b/Documentation/devicetree/bindings/phy/phy-mtk-tphy.txt
> @@ -27,6 +27,10 @@ Optional properties (controller (parent) node):
> - reg : offset and length of register shared by multiple ports,
> exclude port's private register. It is needed on mt2701
> and mt8173, but not on mt2712.
> + - mediatek,src-ref-clk-mhz : frequency of reference clock for slew rate
> + calibrate
> + - mediatek,src-coef : coefficient for slew rate calibrate, depends on
> + SoC process
>
> Required properties (port (child) node):
> - reg : address and length of the register set for the port.
>
Powered by blists - more mailing lists