linux-kernel - [PATCH 4.14 081/140] PCI: dwc: Fix enumeration end when reaching root subordinate

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Message-Id: <20180313152503.578260954@linuxfoundation.org>
Date:   Tue, 13 Mar 2018 16:24:44 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Niklas Cassel <niklas.cassel@...s.com>,
        Fabio Estevam <fabio.estevam@....com>,
        Sebastian Reichel <sebastian.reichel@...labora.co.uk>,
        Koen Vandeputte <koen.vandeputte@...ntric.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Binghui Wang <wangbinghui@...ilicon.com>,
        Jesper Nilsson <jesper.nilsson@...s.com>,
        Jianguo Sun <sunjianguo1@...wei.com>,
        Jingoo Han <jingoohan1@...il.com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Minghuan Lian <minghuan.Lian@...escale.com>,
        Mingkai Hu <mingkai.hu@...escale.com>,
        Murali Karicheri <m-karicheri2@...com>,
        Pratyush Anand <pratyush.anand@...il.com>,
        Richard Zhu <hongxing.zhu@....com>,
        Roy Zang <tie-fei.zang@...escale.com>,
        Shawn Guo <shawn.guo@...aro.org>,
        Stanimir Varbanov <svarbanov@...sol.com>,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
        Xiaowei Song <songxiaowei@...ilicon.com>,
        Zhou Wang <wangzhou1@...ilicon.com>
Subject: [PATCH 4.14 081/140] PCI: dwc: Fix enumeration end when reaching root subordinate

4.14-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Koen Vandeputte <koen.vandeputte@...ntric.com>

commit fc110ebdd014dd1368c98e7685b47789c31fab42 upstream.

The subordinate value indicates the highest bus number which can be
reached downstream though a certain device.

Commit a20c7f36bd3d ("PCI: Do not allocate more buses than available in
parent") ensures that downstream devices cannot assign busnumbers higher
than the upstream device subordinate number, which was indeed illogical.

By default, dw_pcie_setup_rc() inits the Root Complex subordinate to a
value of 0x01.

Due to this combined with above commit, enumeration stops digging deeper
downstream as soon as bus num 0x01 has been assigned, which is always the
case for a bridge device.

This results in all devices behind a bridge bus remaining undetected, as
these would be connected to bus 0x02 or higher.

Fix this by initializing the RC to a subordinate value of 0xff, which is
not altering hardware behaviour in any way, but informs probing function
pci_scan_bridge() later on which reads this value back from register.

The following nasty errors during boot are also fixed by this:

  pci_bus 0000:02: busn_res: can not insert [bus 02-ff] under [bus 01] (conflicts with (null) [bus 01])
  ...
  pci_bus 0000:03: [bus 03] partially hidden behind bridge 0000:01 [bus 01]
  ...
  pci_bus 0000:04: [bus 04] partially hidden behind bridge 0000:01 [bus 01]
  ...
  pci_bus 0000:05: [bus 05] partially hidden behind bridge 0000:01 [bus 01]
  pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 05
  pci_bus 0000:02: busn_res: can not insert [bus 02-05] under [bus 01] (conflicts with (null) [bus 01])
  pci_bus 0000:02: [bus 02-05] partially hidden behind bridge 0000:01 [bus 01]

Fixes: a20c7f36bd3d ("PCI: Do not allocate more buses than available in
parent")
Tested-by: Niklas Cassel <niklas.cassel@...s.com>
Tested-by: Fabio Estevam <fabio.estevam@....com>
Tested-by: Sebastian Reichel <sebastian.reichel@...labora.co.uk>
Signed-off-by: Koen Vandeputte <koen.vandeputte@...ntric.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>
Reviewed-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
Acked-by: Lucas Stach <l.stach@...gutronix.de>
Cc: stable@...r.kernel.org	# v4.15+
Cc: Binghui Wang <wangbinghui@...ilicon.com>
Cc: Jesper Nilsson <jesper.nilsson@...s.com>
Cc: Jianguo Sun <sunjianguo1@...wei.com>
Cc: Jingoo Han <jingoohan1@...il.com>
Cc: Kishon Vijay Abraham I <kishon@...com>
Cc: Lucas Stach <l.stach@...gutronix.de>
Cc: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: Minghuan Lian <minghuan.Lian@...escale.com>
Cc: Mingkai Hu <mingkai.hu@...escale.com>
Cc: Murali Karicheri <m-karicheri2@...com>
Cc: Pratyush Anand <pratyush.anand@...il.com>
Cc: Richard Zhu <hongxing.zhu@....com>
Cc: Roy Zang <tie-fei.zang@...escale.com>
Cc: Shawn Guo <shawn.guo@...aro.org>
Cc: Stanimir Varbanov <svarbanov@...sol.com>
Cc: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Cc: Xiaowei Song <songxiaowei@...ilicon.com>
Cc: Zhou Wang <wangzhou1@...ilicon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

---
 drivers/pci/dwc/pcie-designware-host.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -607,7 +607,7 @@ void dw_pcie_setup_rc(struct pcie_port *
 	/* setup bus numbers */
 	val = dw_pcie_readl_dbi(pci, PCI_PRIMARY_BUS);
 	val &= 0xff000000;
-	val |= 0x00010100;
+	val |= 0x00ff0100;
 	dw_pcie_writel_dbi(pci, PCI_PRIMARY_BUS, val);
 
 	/* setup command register */