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Message-ID: <CAHp75VdYG+i+m12yotuUa2JwW4ndMMXTV0ZSs_qOS5EAw7=M4w@mail.gmail.com>
Date: Tue, 13 Mar 2018 17:58:11 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: "Liang, Kan" <kan.liang@...ux.intel.com>
Cc: "Kroening, Gary" <gary.kroening@....com>,
"mingo@...hat.com" <mingo@...hat.com>,
"hpa@...or.com" <hpa@...or.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"peterz@...radead.org" <peterz@...radead.org>,
"Travis, Mike" <mike.travis@....com>,
"Banman, Andrew" <abanman@....com>,
"Sivanich, Dimitri" <dimitri.sivanich@....com>,
"Anderson, Russ" <russ.anderson@....com>,
"x86@...nel.org" <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] x86/platform/x86: Fix count of CHas on
multi-pci-segment arches
On Tue, Mar 13, 2018 at 3:42 AM, Liang, Kan <kan.liang@...ux.intel.com> wrote:
> +#define SKX_CAPID6 0x9c
> +#define SKX_CHA_BIT_WIDTH 28
> +
> static int skx_count_chabox(void)
> {
> + struct pci_dev *dev = NULL;
> + u32 val = 0;
>
> + dev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x2083, dev);
> + if (!dev)
> + return 0;
Where is pci_dev_put()?
>
> + pci_read_config_dword(dev, SKX_CAPID6, &val);
> + return bitmap_weight((unsigned long *)&val, SKX_CHA_BIT_WIDTH);
UB is here.
Fix is simple, use unsigned long and drop this ugly casting.
> }
--
With Best Regards,
Andy Shevchenko
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