lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <c43cba93-6068-6a2d-3d0a-85057d5f8b10@codeaurora.org>
Date:   Wed, 14 Mar 2018 11:40:43 +0530
From:   Archit Taneja <architt@...eaurora.org>
To:     Enric Balletbo i Serra <enric.balletbo@...labora.com>,
        inki.dae@...sung.com, thierry.reding@...il.com, hjc@...k-chips.com,
        seanpaul@...omium.org, airlied@...ux.ie, tfiga@...omium.org,
        heiko@...ech.de
Cc:     dri-devel@...ts.freedesktop.org, dianders@...omium.org,
        a.hajda@...sung.com, ykk@...k-chips.com, kernel@...labora.com,
        m.szyprowski@...sung.com, linux-samsung-soc@...r.kernel.org,
        jy0922.shim@...sung.com, rydberg@...math.org, krzk@...nel.org,
        linux-rockchip@...ts.infradead.org, kgene@...nel.org,
        linux-input@...r.kernel.org, orjan.eide@....com,
        wxt@...k-chips.com, jeffy.chen@...k-chips.com,
        linux-arm-kernel@...ts.infradead.org, mark.yao@...k-chips.com,
        wzz@...k-chips.com, hl@...k-chips.com, jingoohan1@...il.com,
        sw0312.kim@...sung.com, linux-kernel@...r.kernel.org,
        kyungmin.park@...sung.com, Laurent.pinchart@...asonboard.com,
        kuankuan.y@...il.com, hshi@...omium.org,
        Stéphane Marchesin <marcheu@...omium.org>
Subject: Re: [PATCH v5 12/36] drm/bridge: analogix_dp: Set PD_INC_BG first
 when powering up edp phy



On Saturday 10 March 2018 03:53 AM, Enric Balletbo i Serra wrote:
> From: zain wang <wzz@...k-chips.com>
> 
> Following the correct power up sequence:
> dp_pd=ff => dp_pd=7f => wait 10us => dp_pd=00
> 

Reviewed-by: Archit Taneja <architt@...eaurora.org>

Thanks,
Archit

> Cc: Stéphane Marchesin <marcheu@...omium.org>
> Signed-off-by: zain wang <wzz@...k-chips.com>
> Signed-off-by: Sean Paul <seanpaul@...omium.org>
> Signed-off-by: Thierry Escande <thierry.escande@...labora.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
> Tested-by: Marek Szyprowski <m.szyprowski@...sung.com>
> ---
> 
>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 10 ++++++++--
>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h |  3 +++
>   2 files changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index b47c5af43560..bb72f8b0e603 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -321,10 +321,16 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
>   		break;
>   	case POWER_ALL:
>   		if (enable) {
> -			reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD |
> -				CH1_PD | CH0_PD;
> +			reg = DP_ALL_PD;
>   			writel(reg, dp->reg_base + phy_pd_addr);
>   		} else {
> +			reg = DP_ALL_PD;
> +			writel(reg, dp->reg_base + phy_pd_addr);
> +			usleep_range(10, 15);
> +			reg &= ~DP_INC_BG;
> +			writel(reg, dp->reg_base + phy_pd_addr);
> +			usleep_range(10, 15);
> +
>   			writel(0x00, dp->reg_base + phy_pd_addr);
>   		}
>   		break;
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> index 40200c652533..9602668669f4 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> @@ -342,12 +342,15 @@
>   #define DP_PLL_REF_BIT_1_2500V			(0x7 << 0)
>   
>   /* ANALOGIX_DP_PHY_PD */
> +#define DP_INC_BG				(0x1 << 7)
> +#define DP_EXP_BG				(0x1 << 6)
>   #define DP_PHY_PD				(0x1 << 5)
>   #define AUX_PD					(0x1 << 4)
>   #define CH3_PD					(0x1 << 3)
>   #define CH2_PD					(0x1 << 2)
>   #define CH1_PD					(0x1 << 1)
>   #define CH0_PD					(0x1 << 0)
> +#define DP_ALL_PD				(0xff)
>   
>   /* ANALOGIX_DP_PHY_TEST */
>   #define MACRO_RST				(0x1 << 5)
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ