linux-kernel - Re: [PATCH v2 08/13] ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common data

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Message-ID: <0d38e3baf97a74e3972c0dc7e14538f0@codeaurora.org>
Date:   Fri, 16 Mar 2018 15:52:43 +0530
From:   Abhishek Sahu <absahu@...eaurora.org>
To:     Sricharan R <sricharan@...eaurora.org>
Cc:     robh+dt@...nel.org, robh@...nel.org, mark.rutland@....com,
        linux@...linux.org.uk, andy.gross@...aro.org,
        david.brown@...aro.org, catalin.marinas@....com,
        will.deacon@....com, sboyd@...eaurora.org,
        bjorn.andersson@...aro.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org
Subject: Re: [PATCH v2 08/13] ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common
 data

On 2018-03-16 15:08, Sricharan R wrote:
> Add the common data for all dk07 based boards.
> 
> Signed-off-by: Sricharan R <sricharan@...eaurora.org>

  Reviewed-by: Abhishek Sahu <absahu@...eaurora.org>

> ---
>  arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi | 83 
> +++++++++++++++++++++++++++
>  1 file changed, 83 insertions(+)
>  create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
> b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
> new file mode 100644
> index 0000000..37a2ea8
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
> @@ -0,0 +1,83 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (c) 2018, The Linux Foundation. All rights reserved.
> +
> +#include "qcom-ipq4019.dtsi"
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> +	model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1";
> +	compatible = "qcom,ipq4019";
> +
> +	memory {
> +		device_type = "memory";
> +		reg = <0x80000000 0x20000000>; /* 512MB */
> +	};
> +
> +	reserved-memory {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		rsvd1@...00000 {
> +			/* Reserved for other subsystem */
> +			reg = <0x87000000 0x500000>;
> +			no-map;
> +		};
> +
> +		wifi_dump@...00000 {
> +			reg = <0x87500000 0x600000>;
> +			no-map;
> +		};
> +
> +		rsvd2@...00000 {
> +			/* Reserved for other subsystem */
> +			reg = <0x87B00000 0x500000>;
> +			no-map;
> +		};
> +	};
> +
> +	soc {
> +		pinctrl@...0000 {
> +			serial_0_pins: serial0_pinmux {
> +				mux {
> +					pins = "gpio16", "gpio17";
> +					function = "blsp_uart0";
> +					bias-disable;
> +				};
> +			};
> +
> +			i2c_0_pins: i2c_0_pinmux {
> +				mux {
> +					pins = "gpio20", "gpio21";
> +					function = "blsp_i2c0";
> +					bias-disable;
> +				};
> +			};
> +		};
> +
> +		serial@...f000 {
> +			pinctrl-0 = <&serial_0_pins>;
> +			pinctrl-names = "default";
> +			status = "ok";
> +		};
> +
> +		blsp_dma: dma@...4000 {
> +			status = "ok";
> +		};
> +
> +		i2c_0: i2c@...7000 { /* BLSP1 QUP2 */
> +			pinctrl-0 = <&i2c_0_pins>;
> +			pinctrl-names = "default";
> +			status = "ok";
> +		};
> +
> +		qpic_bam: dma@...4000 {
> +			status = "ok";
> +		};
> +
> +		nand: qpic-nand@...0000 {
> +			status = "ok";
> +		};
> +	};
> +};