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Message-ID: <0a8267721c841603894cbe50fe51560b@codeaurora.org>
Date: Fri, 16 Mar 2018 15:57:03 +0530
From: Abhishek Sahu <absahu@...eaurora.org>
To: Sricharan R <sricharan@...eaurora.org>
Cc: robh+dt@...nel.org, robh@...nel.org, mark.rutland@....com,
linux@...linux.org.uk, andy.gross@...aro.org,
david.brown@...aro.org, catalin.marinas@....com,
will.deacon@....com, sboyd@...eaurora.org,
bjorn.andersson@...aro.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org
Subject: Re: [PATCH v2 10/13] ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2
board file
On 2018-03-16 15:08, Sricharan R wrote:
> Signed-off-by: Sricharan R <sricharan@...eaurora.org>
Reviewed-by: Abhishek Sahu <absahu@...eaurora.org>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts | 26
> +++++++++++++++++++++++++
> 2 files changed, 27 insertions(+)
> create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 8c93fd0..0844087 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -750,6 +750,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
> qcom-ipq4019-ap.dk04.1-c1.dtb \
> qcom-ipq4019-ap.dk04.1-c3.dtb \
> qcom-ipq4019-ap.dk07.1-c1.dtb \
> + qcom-ipq4019-ap.dk07.1-c2.dtb \
> qcom-ipq8064-ap148.dtb \
> qcom-msm8660-surf.dtb \
> qcom-msm8960-cdp.dtb \
> diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
> b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
> new file mode 100644
> index 0000000..c1e909c
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
> @@ -0,0 +1,26 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (c) 2018, The Linux Foundation. All rights reserved.
> +
> +#include "qcom-ipq4019-ap.dk07.1.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C2";
> +
> + soc {
> + pinctrl@...0000 {
> + serial_1_pins: serial1_pinmux {
> + mux {
> + pins = "gpio8", "gpio9";
> + function = "blsp_uart1";
> + bias-disable;
> + };
> + };
> + };
> +
> + serial@...0000 {
> + pinctrl-0 = <&serial_1_pins>;
> + pinctrl-names = "default";
> + status = "ok";
> + };
> + };
> +};
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