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Message-ID: <fed53181-db58-9f48-0c5b-7eebe9eb9b10@arm.com>
Date: Mon, 19 Mar 2018 18:30:16 +0000
From: Marc Zyngier <marc.zyngier@....com>
To: Shanker Donthineni <shankerd@...eaurora.org>
Cc: Will Deacon <will.deacon@....com>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
Catalin Marinas <catalin.marinas@....com>,
kvmarm <kvmarm@...ts.cs.columbia.edu>,
Christoffer Dall <cdall@...nel.org>,
Vikram Sethi <vikrams@...eaurora.org>,
Sean Campbell <scampbel@...eaurora.org>,
Thomas Speier <tspeier@...eaurora.org>
Subject: Re: [PATCH v2] arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP
hardening
On 06/03/18 10:32, Marc Zyngier wrote:
> On Mon, 05 Mar 2018 17:06:43 +0000,
> Shanker Donthineni wrote:
>>
>> The function SMCCC_ARCH_WORKAROUND_1 was introduced as part of SMC
>> V1.1 Calling Convention to mitigate CVE-2017-5715. This patch uses
>> the standard call SMCCC_ARCH_WORKAROUND_1 for Falkor chips instead
>> of Silicon provider service ID 0xC2001700.
>>
>> Signed-off-by: Shanker Donthineni <shankerd@...eaurora.org>
>> ---
>> Chnages since v1:
>> - Trivial change in cpucaps.h (refresh after removing ARM64_HARDEN_BP_POST_GUEST_EXIT)
>>
>> arch/arm64/include/asm/cpucaps.h | 5 ++--
>> arch/arm64/include/asm/kvm_asm.h | 2 --
>> arch/arm64/kernel/bpi.S | 8 ------
>> arch/arm64/kernel/cpu_errata.c | 55 ++++++++++++++--------------------------
>> arch/arm64/kvm/hyp/entry.S | 12 ---------
>> arch/arm64/kvm/hyp/switch.c | 10 --------
>> 6 files changed, 21 insertions(+), 71 deletions(-)
>
> Reviewed-by: Marc Zyngier <marc.zyngier@....com>
>
> Will/Catalin, if you want to take it via the arm64 tree, that's fine
> by me.
Please allow me to change my mind. This is going to conflict horribly
with the VHE rework and the HYP randomization patches.
I'll take it via the KVM tree, which will make everyone's life a lot easier.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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