lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20180319195758.GK77194@bhelgaas-glaptop.roam.corp.google.com>
Date:   Mon, 19 Mar 2018 14:57:58 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     KarimAllah Ahmed <karahmed@...zon.de>
Cc:     linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH] PCI/IOV: Skip initializing the base addresses from the
 VF config space

On Sat, Mar 03, 2018 at 05:33:10AM +0100, KarimAllah Ahmed wrote:
> Per PCIe r4.0, sec 9.3.4.1.11, the BARs registers from the VF config space
> are all RO Zero for PCI VFs. So just skip reading them for VFs.
> 
> This is an optimization when enabling SR-IOV on a device with many VFs.
> 
> Cc: Bjorn Helgaas <bhelgaas@...gle.com>
> Cc: linux-pci@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> Suggested-by: Bjorn Helgaas <helgaas@...nel.org>
> Signed-off-by: KarimAllah Ahmed <karahmed@...zon.de>

Applied to pci/virtualization for v4.17, thanks!

> ---
>  drivers/pci/probe.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index a96837e..7204d46 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -329,6 +329,10 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
>  	if (dev->non_compliant_bars)
>  		return;
>  
> +	/* Per PCIe r4.0, sec 9.3.4.1.11, the VF BARs are all RO Zero */
> +	if (dev->is_virtfn)
> +		return;
> +
>  	for (pos = 0; pos < howmany; pos++) {
>  		struct resource *res = &dev->resource[pos];
>  		reg = PCI_BASE_ADDRESS_0 + (pos << 2);
> -- 
> 2.7.4
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ