[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <152149032034.242365.10971731653439256704@swboyd.mtv.corp.google.com>
Date: Mon, 19 Mar 2018 13:12:00 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Gregory CLEMENT <gregory.clement@...tlin.com>,
Mike Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Jason Cooper <jason@...edaemon.net>, Andrew Lunn <andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Gregory CLEMENT <gregory.clement@...tlin.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
linux-arm-kernel@...ts.infradead.org,
Antoine Tenart <antoine.tenart@...tlin.com>,
Miquèl Raynal <miquel.raynal@...tlin.com>,
Nadav Haklai <nadavh@...vell.com>,
Shadi Ammouri <shadi@...vell.com>,
Omri Itach <omrii@...vell.com>,
Hanna Hawa <hannah@...vell.com>,
Igal Liberman <igall@...vell.com>,
Marcin Wojtas <mw@...ihalf.com>
Subject: Re: [PATCH] clk: mvebu: cp110: Fix clock tree representation
Quoting Gregory CLEMENT (2018-02-28 06:07:51)
> Thanks to new documentation, we have a better view of the clock tree.
> There were few mistakes in the first version of this driver, the main one
> being the parental link between the clocks. Actually the tree is more
> flat that we though. Most of the IP blocks require two clocks: one for
> the IP itself and one for accessing the registers, and unlike what we
> wrote there is no link between these two clocks.
>
> The other mistakes were about the name of the clocks: the root clock is
> not the Audio PLL but the PLL0, and what we called the EIP clock is named
> the x2 Core clock and is used by other IP block than the EIP ones.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@...tlin.com>
> ---
Applied to clk-next
Powered by blists - more mailing lists