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Message-ID: <20180319135505.py4evmbexm2asvlo@flea>
Date: Mon, 19 Mar 2018 14:55:05 +0100
From: Maxime Ripard <maxime.ripard@...tlin.com>
To: Chen-Yu Tsai <wens@...e.org>
Cc: Mylène Josserand <mylene.josserand@...tlin.com>,
Marc Zyngier <marc.zyngier@....com>,
Russell King <linux@...linux.org.uk>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
devicetree <devicetree@...r.kernel.org>,
quentin.schulz@...tlin.com,
linux-kernel <linux-kernel@...r.kernel.org>,
LABBE Corentin <clabbe.montjoie@...il.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v4 10/10] ARM: sunxi: smp: Add initialization of CNTVOFF
On Mon, Mar 19, 2018 at 10:14:19AM +0800, Chen-Yu Tsai wrote:
> On Mon, Mar 19, 2018 at 3:07 AM, Mylène Josserand
> <mylene.josserand@...tlin.com> wrote:
> > Hello Mark,
> >
> > Please, excuse me for this late answer and thank you for the review!
> >
> > On Wed, 7 Mar 2018 12:18:33 +0000
> > Marc Zyngier <marc.zyngier@....com> wrote:
> >
> >> On 23/02/18 13:37, Mylène Josserand wrote:
> >> > On Cortex-A7, the CNTVOFF register from arch timer is uninitialized.
> >>
> >> Only on A7? Is that specific to your platform?
> >
> > I do not really know other Allwinner's platforms about this subject. At
> > least, the sun9i-a80 which is a Cortex-a15/a7 does not need that but it
> > is necessary for sun8i-a83t which is a cortex-a7. Maybe, Chen-Yu or
> > Maxime could help us on it.
>
> AFAIK all Allwinner CPUs need it if there isn't a firmware (PSCI) layer
> beneath the kernel that will do the setup. We just have
> "arm,cpu-registers-not-fw-configured" set for all the other SoCs that
> have in-kernel SMP support, which includes the A31, A23, A33 and A80.
Most of these ones are here for historical reasons though. Now that we
have U-Boot properly setting it up, we could probably remove it.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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