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Message-ID: <20180320184347.h46j2wuwlj73ciag@8bytes.org>
Date: Tue, 20 Mar 2018 13:43:48 -0500
From: Joerg Roedel <joro@...tes.org>
To: Lu Baolu <baolu.lu@...ux.intel.com>
Cc: David Woodhouse <dwmw2@...radead.org>,
iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
Jacob Pan <jacob.jun.pan@...ux.intel.com>,
Kevin Tian <kevin.tian@...el.com>,
Sankaran Rajesh <rajesh.sankaran@...el.com>,
Liu Yi L <yi.l.liu@...el.com>
Subject: Re: [PATCH 1/1] iommu/vt-d: Use real PASID for flush in caching mode
On Fri, Mar 16, 2018 at 12:31:36PM +0800, Lu Baolu wrote:
> If caching mode is supported, the hardware will cache
> none-present or erroneous translation entries. Hence,
> software should explicitly invalidate the PASID cache
> after a PASID table entry becomes present. We should
> issue such invalidation with the PASID value that we
> have changed. PASID 0 is not reserved for this case.
>
> Cc: Jacob Pan <jacob.jun.pan@...ux.intel.com>
> Cc: Kevin Tian <kevin.tian@...el.com>
> Cc: Sankaran Rajesh <rajesh.sankaran@...el.com>
> Suggested-by: Ashok Raj <ashok.raj@...el.com>
> Signed-off-by: Liu Yi L <yi.l.liu@...el.com>
> Signed-off-by: Lu Baolu <baolu.lu@...ux.intel.com>
> ---
> drivers/iommu/intel-svm.c | 16 ++++++----------
> 1 file changed, 6 insertions(+), 10 deletions(-)
Applied, thanks.
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