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Message-Id: <1521736009-23387-4-git-send-email-okaya@codeaurora.org>
Date: Thu, 22 Mar 2018 12:26:49 -0400
From: Sinan Kaya <okaya@...eaurora.org>
To: linux-rdma@...r.kernel.org, timur@...eaurora.org,
sulrich@...eaurora.org
Cc: linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Sinan Kaya <okaya@...eaurora.org>,
Michal Kalderon <Michal.Kalderon@...ium.com>,
Ariel Elior <Ariel.Elior@...ium.com>,
Doug Ledford <dledford@...hat.com>,
Jason Gunthorpe <jgg@...pe.ca>, linux-kernel@...r.kernel.org
Subject: [PATCH v5 3/3] RDMA/qedr: eliminate duplicate barriers on weakly-ordered archs #2
Code includes wmb() followed by writel() in multiple places. writel()
already has a barrier on some architectures like arm64.
This ends up CPU observing two barriers back to back before executing the
register write.
Since code already has an explicit barrier call, changing writel() to
writel_relaxed().
Signed-off-by: Sinan Kaya <okaya@...eaurora.org>
---
drivers/infiniband/hw/qedr/verbs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/infiniband/hw/qedr/verbs.c b/drivers/infiniband/hw/qedr/verbs.c
index 53f00db..d6bd950 100644
--- a/drivers/infiniband/hw/qedr/verbs.c
+++ b/drivers/infiniband/hw/qedr/verbs.c
@@ -860,7 +860,7 @@ static void doorbell_cq(struct qedr_cq *cq, u32 cons, u8 flags)
wmb();
cq->db.data.agg_flags = flags;
cq->db.data.value = cpu_to_le32(cons);
- writeq(cq->db.raw, cq->db_addr);
+ writeq_relaxed(cq->db.raw, cq->db_addr);
/* Make sure write would stick */
mmiowb();
@@ -3338,7 +3338,7 @@ int qedr_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
qp->rq.db_data.data.value++;
- writel(qp->rq.db_data.raw, qp->rq.db);
+ writel_relaxed(qp->rq.db_data.raw, qp->rq.db);
/* Make sure write sticks */
mmiowb();
--
2.7.4
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