[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <alpine.DEB.2.21.1803251348190.1481@nanos.tec.linutronix.de>
Date: Sun, 25 Mar 2018 13:50:40 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Anshuman Gupta <anshuman.gupta@...el.com>
cc: glx@...utronix.de, x86@...nel.org, mingo@...hat.com, hpa@...or.com,
rjw@...ysocki.net, andriy.shevchenko@...ux.intel.com,
alan@...ux.intel.com, linux-kernel@...r.kernel.org,
rajneesh.bhardwaj@...el.com
Subject: Re: [PATCH v3] x86: i8237: Register based on FADT legacy boot flag
On Thu, 22 Mar 2018, Anshuman Gupta wrote:
> From: Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>
>
> >From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
> not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh, 8Fh.
> Currently this driver registers as syscore ops and its resume function is
> called on every resume from S3. On Skylake and Kabylake, this causes a
> resume delay of around 100ms due to port IO operations, which is a problem.
>
> This change allows to load the driver only when the platform bios
> explicitly supports such devices or has a cut-off date earlier than 2017.
Please explain WHY 2017 is the cut-off date. I still have no clue how that
is decided aside of being a random number.
Thanks,
tglx
Powered by blists - more mailing lists