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Message-ID: <CACRpkdZoZD-1D_o2wJd-JpmTpm-EBTQu5=ndrN1KeTvPwHGPdw@mail.gmail.com>
Date: Mon, 26 Mar 2018 10:57:51 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Zhiyong Tao <zhiyong.tao@...iatek.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Matthias Brugger <matthias.bgg@...il.com>,
srv_heupstream@...iatek.com,
Liguo Zhang <liguo.zhang@...iatek.com>,
"Joe.C" <yingjoe.chen@...iatek.com>, hongkun.cao@...iatek.com,
Biao Huang <biao.huang@...iatek.com>,
YT Shen <yt.shen@...iatek.com>,
Hongzhou Yang <hongzhou.yang@...iatek.com>,
Erin Lo <erin.lo@...iatek.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH v4 4/5] pintcrl: support bias-disable of generic and
special pins simultaneously
On Thu, Mar 22, 2018 at 3:58 AM, Zhiyong Tao <zhiyong.tao@...iatek.com> wrote:
> For generic pins, parameter "arg" is 0 or 1.
> For special pins, bias-disable is set by R0R1,
> so we need transmited "00" to set bias-disable
> When we set "bias-disable" as high-z property,
> the parameter should be "MTK_PUPD_SET_R1R0_00".
>
> Signed-off-by: Zhiyong Tao <zhiyong.tao@...iatek.com>
Patch applied for v4.17 with Sean's Review tag.
Yours,
Linus Walleij
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