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Message-ID: <20180327081131.hd652vkhohez2hcc@flea>
Date: Tue, 27 Mar 2018 10:11:31 +0200
From: Maxime Ripard <maxime.ripard@...tlin.com>
To: Icenowy Zheng <icenowy@...c.io>
Cc: linux-arm-kernel@...ts.infradead.org,
Rob Herring <robh@...nel.org>, devicetree@...r.kernel.org,
jernej.skrabec@...l.net, linux-sunxi@...glegroups.com,
linux-kernel@...r.kernel.org, Chen-Yu Tsai <wens@...e.org>,
linux-clk@...r.kernel.org
Subject: Re: [linux-sunxi] Re: [PATCH 2/7] dt-bindings: add binding for the
Allwinner A64 DE2 bus
On Tue, Mar 27, 2018 at 07:31:18AM +0800, Icenowy Zheng wrote:
>
>
> 于 2018年3月27日 GMT+08:00 上午6:22:58, Rob Herring <robh@...nel.org> 写到:
> >On Thu, Mar 22, 2018 at 02:08:43PM +0800, Icenowy Zheng wrote:
> >>
> >>
> >> 于 2018年3月22日 GMT+08:00 上午1:13:42, "Jernej Škrabec"
> ><jernej.skrabec@...l.net> 写到:
> >> >Hi all,
> >> >
> >> >Dne sreda, 21. marec 2018 ob 03:18:13 CET je Icenowy Zheng
> >napisal(a):
> >> >> 于 2018年3月21日 GMT+08:00 上午2:46:46, Maxime Ripard
> >> ><maxime.ripard@...tlin.com>
> >> >写到:
> >> >> >On Sat, Mar 17, 2018 at 01:53:49AM +0800, Icenowy Zheng wrote:
> >> >> >> All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64
> >> >SoC
> >> >> >
> >> >> >to
> >> >> >
> >> >> >> be claimed, otherwise the whole DE2 space is inaccessible.
> >> >> >>
> >> >> >> Add a device tree binding of the DE2 part as a sub-bus.
> >> >> >
> >> >> >Where did you get the info that it was a bus?
> >> >>
> >> >> There's no direct evidence, just some guess.
> >> >>
> >> >> The DE2 is a whole part that is just allocated a memory
> >> >> space at the user manual, and the SRAM controls the
> >> >> access to all modules in the DE2.
> >> >>
> >> >> So it might be a bus.
> >> >>
> >> >> Implement it as a bus is a clear representation on A64.
> >> >
> >> >Since there is already syscon for same mmio region, we migh as well
> >use
> >> >it
> >> >when loading ccu-sun8i-de2 driver on A64.
> >> >
> >> >Other options, like SRAM driver or bus driver, might better
> >represent
> >> >HW, but
> >>
> >> I think the device tree should properly represent the HW,
> >> it's a basic requirment.
> >>
> >> >then we would have two DT nodes covering same mmio region, which I
> >> >think is
> >> >not really acceptable.
> >>
> >> It's acceptable, and DE2 is not the only user of SRAM controller so
> >far.
> >
> >No, it's not acceptable. Don't create overlapping mmio regions in DT.
>
> Then should the SRAM controller driver be configured to take the syscon?
We could have a single DT node that would export a syscon yes, just
like you did for the R40 ethernet case.
I'm not sure the SRAM controller itself needs to take the syscon, it
just can export its own.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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