lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CACRpkdatq6B7Of1DZAq0RcwcHxf6Qy1HcMaCC=3Wb_ogYsYfvw@mail.gmail.com>
Date:   Tue, 27 Mar 2018 15:15:28 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Cc:     "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pinctrl: uniphier: add UART hardware flow control pin-mux settings

On Mon, Mar 19, 2018 at 9:13 AM, Kunihiko Hayashi
<hayashi.kunihiko@...ionext.com> wrote:

> UniPhier SoCs have the following pins for hardware flow control of UART:
>   XRTS, XCTS
> and for modem control of UART:
>   XDTR, XDSR, XDCD, XRI
>
> The port number with the flow control is SoC-dependent.
>
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>

Patch applied with Masahiro's ACK!

Yours,
Linus Walleij

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ