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Message-Id: <fa3a0fcd74f271647322a5acaba0d4e2daa5d26f.1522235224.git.gustavo.pimentel@synopsys.com>
Date: Wed, 28 Mar 2018 12:38:37 +0100
From: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
To: bhelgaas@...gle.com, lorenzo.pieralisi@....com,
Joao.Pinto@...opsys.com, jingoohan1@...il.com, kishon@...com,
robh+dt@...nel.org, mark.rutland@....com
Cc: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, gustavo.pimentel@...opsys.com
Subject: [PATCH 7/8] PCI: dwc: Small computation improvement
Replaces a simple division by 2 to a right shiftrotation of 1 bit.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
---
drivers/pci/dwc/pcie-designware-host.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
index 03e9b82..8e6fed4 100644
--- a/drivers/pci/dwc/pcie-designware-host.c
+++ b/drivers/pci/dwc/pcie-designware-host.c
@@ -332,8 +332,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
if (cfg_res) {
- pp->cfg0_size = resource_size(cfg_res) / 2;
- pp->cfg1_size = resource_size(cfg_res) / 2;
+ pp->cfg0_size = resource_size(cfg_res) >> 1;
+ pp->cfg1_size = resource_size(cfg_res) >> 1;
pp->cfg0_base = cfg_res->start;
pp->cfg1_base = cfg_res->start + pp->cfg0_size;
} else if (!pp->va_cfg0_base) {
@@ -377,8 +377,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
break;
case 0:
pp->cfg = win->res;
- pp->cfg0_size = resource_size(pp->cfg) / 2;
- pp->cfg1_size = resource_size(pp->cfg) / 2;
+ pp->cfg0_size = resource_size(pp->cfg) >> 1;
+ pp->cfg1_size = resource_size(pp->cfg) >> 1;
pp->cfg0_base = pp->cfg->start;
pp->cfg1_base = pp->cfg->start + pp->cfg0_size;
break;
--
2.7.4
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