lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <tip-e2efacb6a54ab54626da3507be1008d0040492cc@git.kernel.org>
Date:   Wed, 28 Mar 2018 11:39:48 -0700
From:   tip-bot for Yazen Ghannam <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     yazen.ghannam@....com, Yazen.Ghannam@....com, mingo@...nel.org,
        linux-kernel@...r.kernel.org, tglx@...utronix.de, hpa@...or.com
Subject: [tip:ras/core] Revert "x86/mce/AMD: Collect error info even if
 valid bits are not set"

Commit-ID:  e2efacb6a54ab54626da3507be1008d0040492cc
Gitweb:     https://git.kernel.org/tip/e2efacb6a54ab54626da3507be1008d0040492cc
Author:     Yazen Ghannam <yazen.ghannam@....com>
AuthorDate: Mon, 26 Mar 2018 14:15:25 -0500
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Wed, 28 Mar 2018 20:34:59 +0200

Revert "x86/mce/AMD: Collect error info even if valid bits are not set"

This reverts commit 4b1e84276a6172980c5bf39aa091ba13e90d6dad.

Software uses the valid bits to decide if the values can be used for
further processing or other actions. So setting the valid bits will have
software act on values that it shouldn't be acting on.

The recommendation to save all the register values does not mean that
the values are always valid.

Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Cc: tony.luck@...el.com
Cc: Yazen Ghannam <Yazen.Ghannam@....com>
Cc: bp@...e.de
Cc: linux-edac@...r.kernel.org
Link: https://lkml.kernel.org/r/20180326191526.64314-1-Yazen.Ghannam@amd.com

---
 arch/x86/kernel/cpu/mcheck/mce.c | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 21962c48dad7..3c1eec17312b 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -446,20 +446,6 @@ static inline void mce_gather_info(struct mce *m, struct pt_regs *regs)
 		if (mca_cfg.rip_msr)
 			m->ip = mce_rdmsrl(mca_cfg.rip_msr);
 	}
-
-	/*
-	 * Error handlers should save the values in MCA_ADDR, MCA_MISC0, and
-	 * MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and
-	 * MCA_STATUS[SyndV] are zero.
-	 */
-	if (m->cpuvendor == X86_VENDOR_AMD) {
-		u64 status = MCI_STATUS_ADDRV | MCI_STATUS_MISCV;
-
-		if (mce_flags.smca)
-			status |= MCI_STATUS_SYNDV;
-
-		m->status |= status;
-	}
 }
 
 int mce_available(struct cpuinfo_x86 *c)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ