linux-kernel - Re: [PATCH v4 1/3] perf/core: store context switch out type into Perf trace

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Message-ID: <20180329154323.mxi3iaaqimtozjoj@lakrids.cambridge.arm.com>
Date:   Thu, 29 Mar 2018 16:43:24 +0100
From:   Mark Rutland <mark.rutland@....com>
To:     Alexey Budankov <alexey.budankov@...ux.intel.com>
Cc:     Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Andi Kleen <ak@...ux.intel.com>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 1/3] perf/core: store context switch out type into
 Perf trace

Hi,

On Thu, Mar 29, 2018 at 06:02:48PM +0300, Alexey Budankov wrote:
> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> index 912b85b52344..cd6ad7e13824 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -655,6 +655,10 @@ struct perf_event_mmap_page {
>   * perf_event_attr::precise_ip.
>   */
>  #define PERF_RECORD_MISC_EXACT_IP		(1 << 14)
> +/*
> + * Indicates that thread was preempted in TASK_RUNNING state
> + */
> +#define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT	(1 << 14)
>  /*
>   * Reserve the last bit to indicate some extended misc field
>   */

Could you please add a description (in the header) describing why it's safe to
reuse this bit? i.e. describe which events these are valid for, so it's clear
they don't overlap.

For bit 13 we have:

/*
 * Following PERF_RECORD_MISC_* are used on different
 * events, so can reuse the same bit position:
 *
 *   PERF_RECORD_MISC_MMAP_DATA  - PERF_RECORD_MMAP* events
 *   PERF_RECORD_MISC_COMM_EXEC  - PERF_RECORD_COMM event
 *   PERF_RECORD_MISC_SWITCH_OUT - PERF_RECORD_SWITCH* events
 */
#define PERF_RECORD_MISC_MMAP_DATA              (1 << 13)
#define PERF_RECORD_MISC_COMM_EXEC              (1 << 13)
#define PERF_RECORD_MISC_SWITCH_OUT             (1 << 13)

Thanks,
Mark.