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Message-ID: <1522403622-31146-3-git-send-email-davidwang@zhaoxin.com>
Date:   Fri, 30 Mar 2018 17:53:42 +0800
From:   David Wang <davidwang@...oxin.com>
To:     <tony.luck@...el.com>, <bp@...en8.de>, <tglx@...utronix.de>,
        <mingo@...hat.com>, <hpa@...or.com>, <x86@...nel.org>,
        <linux-edac@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC:     <brucechang@...-alliance.com>, <cooperyan@...oxin.com>,
        <qiyuanwang@...oxin.com>, <benjaminpan@...tech.com>,
        <lukelin@...cpu.com>, <timguo@...oxin.com>,
        David Wang <davidwang@...oxin.com>
Subject: [PATCH 2/2] x86/mce: add CMCI support for centaur CPUs

This patch is used to tell the kernel that centaur CPUs support CMCI
mechanism which is compatible with INTEL CMCI.

Signed-off-by: David Wang <davidwang@...oxin.com>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 82b25e1..62aa85c 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1751,6 +1751,7 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 {
 	switch (c->x86_vendor) {
 	case X86_VENDOR_INTEL:
+	case X86_VENDOR_CENTAUR:
 		mce_intel_feature_init(c);
 		mce_adjust_timer = cmci_intel_adjust_timer;
 		break;
-- 
1.9.1

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