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Message-ID: <1522665546-10035-4-git-send-email-radheys@xilinx.com>
Date: Mon, 2 Apr 2018 16:09:03 +0530
From: Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
To: <vinod.koul@...el.com>, <dan.j.williams@...el.com>,
<michal.simek@...inx.com>, <appana.durga.rao@...inx.com>,
<radheys@...inx.com>, <lars@...afoo.de>
CC: <dmaengine@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: [RFC 3/6] dmaengine: xilinx_dma: Increase AXI DMA transaction segment count
Increase AXI DMA transaction segments count to ensure that even in
high load we always get a free segment in prepare descriptor for a
DMA_SLAVE transaction.
Signed-off-by: Radhey Shyam Pandey <radheys@...inx.com>
---
drivers/dma/xilinx/xilinx_dma.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 16fee30..36e1ab9 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -165,7 +165,7 @@
#define XILINX_DMA_BD_SOP BIT(27)
#define XILINX_DMA_BD_EOP BIT(26)
#define XILINX_DMA_COALESCE_MAX 255
-#define XILINX_DMA_NUM_DESCS 255
+#define XILINX_DMA_NUM_DESCS 512
#define XILINX_DMA_NUM_APP_WORDS 5
/* Multi-Channel DMA Descriptor offsets*/
--
1.7.1
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