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Message-ID: <405911c8-fffc-5bd7-76c5-f7aabde3b7bc@ti.com>
Date: Mon, 2 Apr 2018 11:05:05 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
<bhelgaas@...gle.com>, <lorenzo.pieralisi@....com>,
<Joao.Pinto@...opsys.com>, <jingoohan1@...il.com>,
<robh+dt@...nel.org>, <mark.rutland@....com>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>
Subject: Re: [PATCH 3/8] bindings: PCI: designware: Add support for the EP in
designware driver
On Wednesday 28 March 2018 05:08 PM, Gustavo Pimentel wrote:
> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
Please add a commit message.
> ---
> Documentation/devicetree/bindings/pci/designware-pcie.txt | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> index 6300762..4bb2e08 100644
> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> @@ -3,6 +3,7 @@
> Required properties:
> - compatible:
> "snps,dw-pcie" for RC mode;
> + "snps,dw-pcie-ep" for EP mode;
> - reg: Should contain the configuration address space.
> - reg-names: Must be "config" for the PCIe configuration space.
> (The old way of getting the configuration address space from "ranges"
> @@ -56,3 +57,15 @@ Example configuration:
> #interrupt-cells = <1>;
> num-lanes = <1>;
> };
> +or
> + pcie_ep: pcie_ep@...00000 {
> + compatible = "snps,dw-pcie-ep";
> + reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
> + <0xdfc01000 0x0001000>, /* IP registers 2 */
Doesn't this have iATU unroll space?
Thanks
Kishon
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