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Message-Id: <1522760109-16497-2-git-send-email-okaya@codeaurora.org>
Date: Tue, 3 Apr 2018 08:55:04 -0400
From: Sinan Kaya <okaya@...eaurora.org>
To: linux-mips@...ux-mips.org, arnd@...db.de, timur@...eaurora.org,
sulrich@...eaurora.org
Cc: linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Sinan Kaya <okaya@...eaurora.org>,
Ralf Baechle <ralf@...ux-mips.org>,
James Hogan <jhogan@...nel.org>,
Paul Burton <paul.burton@...s.com>,
linux-kernel@...r.kernel.org
Subject: [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX()
While a barrier is present in writeX() function before the register write,
a similar barrier is missing in the readX() function after the register
read. This could allow memory accesses following readX() to observe
stale data.
Signed-off-by: Sinan Kaya <okaya@...eaurora.org>
Reported-by: Arnd Bergmann <arnd@...db.de>
---
arch/mips/include/asm/io.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index fd00ddaf..6ac502f 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -377,6 +377,7 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \
BUG(); \
} \
\
+ rmb(); \
return pfx##ioswab##bwlq(__mem, __val); \
}
--
2.7.4
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